adibis / Interrupt_ControllerLinks
An 8 input interrupt controller written in Verilog.
☆27Updated 13 years ago
Alternatives and similar repositories for Interrupt_Controller
Users that are interested in Interrupt_Controller are comparing it to the libraries listed below
Sorting:
- I am a VLSI enthusiast and I'm going to start my journey of 100 days of RTL.☆24Updated last year
- Architectural design of data router in verilog☆31Updated 5 years ago
- Implementing Different Adder Structures in Verilog☆70Updated 5 years ago
- Asynchronous fifo in verilog☆35Updated 9 years ago
- 100DaysofRTL & System Verilog design: basic logic gates, mux, half/full subtractor, Encoder, D flipflop, 8 bit counter, LFSR, Custom Coun…☆34Updated 2 years ago
- Comprehensive verification suite for the AHB2APB Bridge design, featuring SystemVerilog and UVM-based methodologies. 🌉🚀☆29Updated last year
- System Verilog using Functional Verification☆12Updated last year
- The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB…☆61Updated 2 years ago
- ☆20Updated 2 years ago
- SystemVerilog examples and projects☆17Updated 2 weeks ago
- DMA Hardware Description with Verilog☆14Updated 5 years ago
- ☆12Updated 2 months ago
- Verification of DMA Controller for 8086 Microprocessor Systems using OO Test bench☆12Updated 5 years ago
- A complete UVM TB for verification of single port 64KB RAM☆16Updated 4 years ago
- ☆17Updated 2 years ago
- ☆17Updated 10 years ago
- ☆16Updated last year
- A repository aggregating links to essential documentation, tutorials, and research papers for hardware Design Verification.☆19Updated last month
- ☆43Updated 4 years ago
- UART design in SV and verification using UVM and SV☆44Updated 5 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆64Updated 5 years ago
- To design test bench of the APB protocol☆17Updated 4 years ago
- Implementation of the pipelined RISC V processor with many useful features as fully bypassing, dynamic branch prediction, single and mult…☆14Updated last year
- Maven Silicon Project☆19Updated 6 years ago
- Verification IP for Watchdog☆11Updated 4 years ago
- Implementation of a Serial Peripheral Interface(SPI) using Verilog and testing various modes of the SPI Device☆12Updated 11 months ago
- This is the UVM environment for UART-APB IP core. This environment contains full UVM components. It is only used for studing and invetiga…☆24Updated 5 years ago
- - A 1X3 Router (capable of routing the data packets to three different clients form a single source network) was designed, including a re…☆10Updated 6 years ago
- Synthesizable Verilog Source Codes(DUT), Test-bench and Simulation Results.☆36Updated 6 years ago
- Advanced encryption standard (AES) algorithm has been widely deployed in cryptographic applications. This work proposes a low power and h…☆21Updated 4 years ago