A Tiny Processor Core
☆114Jul 14, 2025Updated 9 months ago
Alternatives and similar repositories for leros
Users that are interested in leros are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A very simple UART implementation in MyHDL☆17Aug 21, 2014Updated 11 years ago
- Lipsi: Probably the Smallest Processor in the World☆88Apr 15, 2024Updated 2 years ago
- RISC-V RV64IS-compatible processor for the Kestrel-3☆21Feb 24, 2023Updated 3 years ago
- FPGA config visualized. demo:☆20Mar 17, 2020Updated 6 years ago
- MyBlaze is a synthesizable clone of the MicroBlaze Soft Processor written in MyHDL (http://www.myhdl.org). It started as a translation of…☆17May 30, 2013Updated 12 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Lab assignments for the Agile Hardware Design course☆18Nov 14, 2025Updated 5 months ago
- Open PicoBlaze Assembler☆63Oct 29, 2023Updated 2 years ago
- Simple RISC-V 3-stage Pipeline in Chisel☆607Aug 9, 2024Updated last year
- A collection of HDL cores written in MyHDL.☆12Oct 28, 2015Updated 10 years ago
- Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project☆154Jan 8, 2026Updated 3 months ago
- Specification of the Wishbone SoC Interconnect Architecture☆52Jun 5, 2022Updated 3 years ago
- Learning how to make RISC-V 32bit CPU with Chisel☆71Sep 17, 2021Updated 4 years ago
- Digital Design with Chisel☆910Apr 16, 2026Updated 2 weeks ago
- An almost empty chisel project as a starting point for hardware design☆36Jan 27, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- VHDLproc is a VHDL preprocessor☆24May 12, 2022Updated 3 years ago
- ☆26Sep 3, 2020Updated 5 years ago
- VHDL plugin for RgGen☆15Apr 19, 2026Updated 2 weeks ago
- Episode I - RISCV CPU implementation tutorial for Cologne Chip Gatemate E1, adopted from https://github.com/BrunoLevy/learn-fpga☆17Apr 7, 2026Updated 3 weeks ago
- A template project for beginning new Chisel work☆696Feb 24, 2026Updated 2 months ago
- Port of the LLVM compiler infrastructure to the time-predictable processor Patmos☆15Apr 2, 2025Updated last year
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆48Apr 4, 2022Updated 4 years ago
- ☆22Oct 24, 2020Updated 5 years ago
- chisel tutorial exercises and answers☆751Jan 6, 2022Updated 4 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Linux-kernel related code (patch form mark1/logibone support, kernel modules for communication, etc), can link to supported repositories☆23Apr 12, 2017Updated 9 years ago
- Simplified environment for litex☆14Oct 5, 2020Updated 5 years ago
- Chisel examples and code snippets☆277Aug 1, 2022Updated 3 years ago
- Provides various testers for chisel users☆101Jan 12, 2023Updated 3 years ago
- Chisel Cheatsheet☆37Apr 13, 2023Updated 3 years ago
- A dynamic verification library for Chisel.☆161Nov 9, 2024Updated last year
- An implementation of RISC-V☆50Updated this week
- A framework for FPGA emulation of mixed-signal systems☆39Jul 28, 2021Updated 4 years ago
- Problem B: 3D Placement with D2D Vertical Connections☆12Jun 30, 2022Updated 3 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- Cross compile FPGA tools☆21Jan 4, 2021Updated 5 years ago
- Sphinx Extension which generates various types of diagrams from Verilog code.☆65Sep 25, 2023Updated 2 years ago
- An alternative PnR system, or at least an attempt to get it running on Ubuntu 18.04.☆10Aug 31, 2018Updated 7 years ago
- pyVhdl2sch is a python based VHDL to (pdf) schematic converter☆33Oct 20, 2019Updated 6 years ago
- ☆12Jun 4, 2021Updated 4 years ago
- Fine Grain FPGA Overlay Architecture and Tools☆27Nov 5, 2021Updated 4 years ago
- Virtual development board for HDL design☆42Mar 31, 2023Updated 3 years ago