myriadrf / xtrx-fpga-source
The source code for the XTRX FPGA image
☆15Updated 2 years ago
Alternatives and similar repositories for xtrx-fpga-source:
Users that are interested in xtrx-fpga-source are comparing it to the libraries listed below
- XTRX LiteX/LitePCIe based design for Julia Computing☆26Updated last year
- LiteX Accelerator Block for GNU Radio☆24Updated 3 years ago
- Tool to fetch and parse data about Efabless MPW projects☆15Updated 2 years ago
- Low-level XTRX hardware abstraction library☆14Updated 2 years ago
- LimeSDR XTRX gateware project.☆16Updated 2 months ago
- a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface☆32Updated 3 years ago
- This repository contains iCEBreaker examples for Amaranth HDL.☆38Updated last year
- Lime Adaptive Digital Predistortion☆23Updated last year
- System on Chip toolkit for nMigen☆19Updated 5 years ago
- Projects published on controlpaths.com and hackster.io☆40Updated 2 years ago
- A USRP B200 compatible GPSDO board with the u-blox LEA-M8F☆15Updated 8 years ago
- An SDR for Raspberry Pi☆35Updated 4 years ago
- ☆16Updated 2 years ago
- Small footprint and configurable Inter-Chip communication cores☆57Updated 2 weeks ago
- Time to Digital Converter (TDC)☆30Updated 4 years ago
- PCIe adapter for an FPGA accelerator for Open CloudServer☆23Updated 4 years ago
- An all-digital GPS disciplined oscillator using MMCM phase shift.☆29Updated 2 years ago
- RISC-V System on Chip Builder☆12Updated 4 years ago
- Siglent SDS1x0xX-E FPGA bitstreams☆41Updated 4 months ago
- Program Lattice MachXO2/3 with CircuitPython☆12Updated 5 years ago
- EVEREST: e-Versatile Research Stick for peoples☆36Updated 2 years ago
- iCE40 floorplan viewer☆24Updated 6 years ago
- A padring generator for ASICs☆25Updated last year
- Adder in VHDL to test the digital flow using ghdl and GTKwave (front-end) and openlane (back-end). Translated from the original https://g…☆11Updated 3 years ago
- an experimental SDR platform☆43Updated 2 years ago
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆44Updated this week
- FPGA development platform for high-performance RF and digital design☆32Updated 9 years ago
- Prototype phase noise analyzer☆19Updated 4 years ago
- Utilities for the ECP5 FPGA☆18Updated 3 years ago
- Proof of Concept to learn Amaranth as an entry effort for Supercon's RTL design competition☆10Updated 2 years ago