Alternatives and similar repositories for PYNQ-SVM-OpenHW-2020:

Users that are interested in PYNQ-SVM-OpenHW-2020 are comparing it to the libraries listed below

• romulus0914 / CNN_VGG19_verilog
  Convolution Neural Network of vgg19 model in verilog
  ☆46Updated 7 years ago
• esa-tu-darmstadt / SCAIE-V
  An Open-Source SCAlable Interface for ISA Extensionsfor RISC-V Processors. New Version:
  ☆14Updated 11 months ago
• sfox14 / darknet-zynq
  Accelerating DNN inference and training on Zynq
  ☆15Updated 4 years ago
• sazczmh / Ultra96-PYNQ_A-simple-summary
  Ultra96 PYNQ入门之一次简单的总结
  ☆14Updated 4 years ago
• lirui-shanghaitech / A-convolution-kernel-implemented-by-Vivado-HLS
  This project implements a convolution kernel based on vivado HLS on zcu104
  ☆37Updated 4 years ago
• g0kul / vcnn
  Verilog Convolutional Neural Network on PYNQ
  ☆28Updated 6 years ago
• jonathan93sh / CNNA
  A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA
  ☆22Updated 3 years ago
• jianyicheng / svm_hls_on_zynq
  Supporting Vector Machine Classsfications Using High-Level Synthesis
  ☆7Updated 6 years ago
• mpccelon / hardware-accelerated-hog-svm
  HOG-SVM algorithm implemented in a Zynq 7000 SoC (Digilent ZYBO)
  ☆15Updated 6 years ago
• yuehniu / CNN.frequencyFPGA
  CNN Accelerator in Frequency Domain
  ☆12Updated 5 years ago
• AlexMontgomerie / samo
  SAMO: Streaming Architecture Mapping Optimisation
  ☆32Updated last year
• TUD-ADS / HiFlipVX
  ☆17Updated 2 years ago
• leonardopennino / PYNQ-Z2-IMPROC
  IMAGE PROCESSING ON XILINX PYNQ Z2 (CANNY, SOBEL)
  ☆25Updated 3 years ago
• xliu0709 / WinoCNN
  An HLS based winograd systolic CNN accelerator
  ☆50Updated 3 years ago
• esa-tu-darmstadt / tapasco-riscv
  RISC-V soft-core PEs for TaPaSCo
  ☆18Updated 8 months ago
• onioncc / iSmartDNN
  Light-weighted neural network inference for object detection on small-scale FPGA board
  ☆91Updated 5 years ago
• xupsh / 2019_SummerCamp
  2019 SEU-Xilinx Summer School
  ☆48Updated 5 years ago
• Zaoldyeckk / High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS
  This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…
  ☆51Updated 6 years ago
• dhm2013724 / Xilinx_FPGA_HLS-Mapping-Neural-Network-to-Hardware
  At present, just an example to show how to map the detection algorithm YOLOv2 from model to FPGA
  ☆31Updated 6 years ago
• Xilinx / PYNQ-HelloWorld
  This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.
  ☆98Updated 2 years ago
• hsiehong / tpu
  AIChip 2021 project, NCKU
  ☆14Updated 3 years ago
• drichmond / PYNQ-HLS
  A Tutorial on Putting High-Level Synthesis cores in PYNQ
  ☆104Updated 6 years ago
• mnnuahg / StamicCGRA
  A static dataflow CGRA with dynamic dataflow execution capability
  ☆10Updated 3 years ago
• sopynq / huffman-encoding-core
  Huffman encoding core (Vivado HLS Project)
  ☆12Updated 5 years ago
• buaa-zzx / Deep_learning_on_FPGA
  在FPGA上部署深度学习项目
  ☆21Updated 3 years ago
• LCAI-TIHU / HW
  LCAI-TIHU HW is an AI inference processor which is comprised of RISC-V cpu, nvdla, NoC bus, PCIe module, DDR, SRAM, bootROM, DMA and peri…
  ☆36Updated 2 years ago
• jgoeders / dac_sdc_2020_designs
  Designs for finalist teams of the DAC System Design Contest
  ☆36Updated 4 years ago
• cxdzyq1110 / posture_recognition_CNN
  To help machines learn what we human beings are doing via a camera is important. Once it comes true, machines can make different response…
  ☆52Updated 6 years ago
• charley871103 / TPU
  AI Chip project
  ☆17Updated 3 years ago
• isi-rcg / spicy
  Hot & Spicy tool suite
  ☆23Updated 3 years ago