leonardopennino / PYNQ-Z2-IMPROC
IMAGE PROCESSING ON XILINX PYNQ Z2 (CANNY, SOBEL)
☆26Updated 3 years ago
Alternatives and similar repositories for PYNQ-Z2-IMPROC:
Users that are interested in PYNQ-Z2-IMPROC are comparing it to the libraries listed below
- This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.☆84Updated last year
- PYNQ Composabe Overlays☆70Updated 9 months ago
- Pynq projects and guides☆27Updated 6 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆44Updated 4 years ago
- Zynq-7000 DPU TRD☆44Updated 5 years ago
- Convolutional Neural Network Using High Level Synthesis☆85Updated 4 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆92Updated last year
- Pynq computer vision examples with an OV5640 camera☆45Updated 4 years ago
- This repository hosts the code for an FPGA based accelerator for convolutional neural networks☆144Updated 9 months ago
- ☆45Updated 6 years ago
- Convolutional Neural Network Implemented in Verilog for System on Chip☆27Updated 5 years ago
- This repository contains all the parameters you need to synthesize the AlexNet by using Vivado High Level Synthesis.☆21Updated 7 years ago
- Systolic array based simple TPU for CNN on PYNQ-Z2☆29Updated 2 years ago
- SDRAM controller with AXI4 interface☆89Updated 5 years ago
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆60Updated 7 months ago
- This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.☆101Updated 2 years ago
- Integration on PL side of Zynq7000 for PYNQ framework of common industrial devices (GPIO, I2C, SPI and UART)☆33Updated 3 years ago
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆39Updated last year
- The CNN based on the Xilinx Vivado HLS☆37Updated 3 years ago
- An LeNet RTL implement onto FPGA☆44Updated 6 years ago
- Interface Protocol in Verilog☆49Updated 5 years ago
- RTL Verilog library for various DSP modules☆85Updated 3 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆46Updated 4 years ago
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆106Updated 4 years ago
- This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.☆49Updated 7 years ago
- ☆63Updated 6 years ago
- IP operations in verilog (simulation and implementation on ice40)☆55Updated 5 years ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆104Updated 6 years ago
- A real time Histogram of Oriented Gradients Implementation on FPGA☆32Updated 6 years ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆71Updated 6 years ago