tooddler / FPGA_SpikingTransformerLinks
FPGA-based SNN Accelerator Toy
☆16Updated last week
Alternatives and similar repositories for FPGA_SpikingTransformer
Users that are interested in FPGA_SpikingTransformer are comparing it to the libraries listed below
Sorting:
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆156Updated 2 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆36Updated 6 years ago
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆114Updated last year
- Efficient FPGA-Based Accelerator for Convolutional Neural Networks☆19Updated 11 months ago
- to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…☆80Updated 4 years ago
- 一个开源的FPGA神经网络加速器。☆169Updated last year
- Spiking Neural Network RTL Implementation☆58Updated 4 years ago
- General CNN_Accelerator design.卷积神经网络加速器设计。在PYNQ-Z2 FPGA开发板上实现了卷积池化全连接层等硬件加速计算。☆56Updated 4 months ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆60Updated 4 months ago
- Convolutional Neural Network RTL-level Design☆60Updated 3 years ago
- Some attempts to build CNN on PYNQ.☆24Updated 6 years ago
- 【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码☆77Updated 2 years ago
- SNN on FPGA☆10Updated 3 years ago
- 可运行☆35Updated 3 years ago
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆184Updated 8 months ago
- Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.☆150Updated 4 years ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆23Updated 5 years ago
- ☆11Updated last year
- some interesting demos for starters☆81Updated 2 years ago
- CNN hardware accelerator to accelerate quantized LeNet-5 model☆38Updated last year
- This repository contains all the necessary material to implement a YOLOv3 object detection algorithm on the PYNQ-Z2 FPGA. There is a step…☆68Updated 4 months ago
- A three-layer LIF neuron SNN accelerator. The first layer is the input layer and has 784 neurons, that receive the encoded spikes. The se…☆13Updated last year
- syn script for DC Compiler☆13Updated 3 years ago
- ES-203 Computer Organization & Architecture CNN on FPGA board☆15Updated 3 years ago
- Nuclei E203 with yolo accelerator based on xc7k325☆14Updated 11 months ago
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆38Updated 5 years ago
- ☆15Updated 3 years ago
- ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.☆186Updated 6 years ago
- A neural network built in Verilog for the DE1-SoC FPGA board for handwritten digit recognition.☆17Updated 5 years ago
- MNIST using tensorflow, c++ and fpga (zynq7010)☆25Updated 2 years ago