Alternatives and similar repositories for fpga-npu

Users that are interested in fpga-npu are comparing it to the libraries listed below

• embedeep / FREE-TPU-V3plus-for-FPGA
  FREE TPU V3plus for FPGA is the free version of a commercial AI processor (EEP-TPU) for Deep Learning EDGE Inference
  ☆159Updated 2 years ago
• vortexgpgpu / vortex_tutorials
  ☆192Updated last week
• sld-columbia / esp
  Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
  ☆387Updated last week
• thousrm / universal_NPU-CNN_accelerator
  hardware design of universal NPU(CNN accelerator) for various convolution neural network
  ☆154Updated 7 months ago
• drichmond / RISC-V-On-PYNQ
  RISC-V Integration for PYNQ
  ☆176Updated 6 years ago
• pulp-platform / iDMA
  A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)
  ☆184Updated last month
• XUANTIE-RV / riscv-matrix-extension-spec
  A matrix extension proposal for AI applications under RISC-V architecture
  ☆153Updated 8 months ago
• Xilinx / xup_high_level_synthesis_design_flow
  AMD University Program HLS tutorial
  ☆116Updated last year
• danshanley / FPU
  IEEE 754 floating point unit in Verilog
  ☆148Updated 9 years ago
• pulp-platform / hero
  Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…
  ☆112Updated 2 years ago
• cameronshinn / tiny-tpu
  Small-scale Tensor Processing Unit built on an FPGA
  ☆206Updated 6 years ago
• pulp-platform / cheshire
  A minimal Linux-capable 64-bit RISC-V SoC built around CVA6
  ☆291Updated this week
• hossein1387 / BARVINN
  BARVINN: A Barrel RISC-V Neural Network Accelerator: https://barvinn.readthedocs.io/en/latest/
  ☆91Updated 9 months ago
• Fraunhofer-IMS / airisc_core_complex
  Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional peripherals for embedded AI applications and smart sensors.
  ☆96Updated 4 months ago
• dpretet / axi-crossbar
  An AXI4 crossbar implementation in SystemVerilog
  ☆177Updated last month
• pulp-platform / pulp-sdk
  ☆119Updated 2 weeks ago
• esl-epfl / x-heep
  eXtendable Heterogeneous Energy-Efficient Platform based on RISC-V
  ☆217Updated last week
• THU-DSP-LAB / ventus-gpgpu-verilog
  GPGPU supporting RISCV-V, developed with verilog HDL
  ☆118Updated 8 months ago
• learnwithexamples / learnsystemc
  Learn systemC with examples
  ☆123Updated 2 years ago
• Jerc007 / Open-GPGPU-FlexGrip-
  FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation
  ☆109Updated 2 years ago
• aliemo / transfomers-silicon-research
  Research and Materials on Hardware implementation of Transformer Model
  ☆285Updated 8 months ago
• openhwgroup / core-v-cores
  CORE-V Family of RISC-V Cores
  ☆302Updated 8 months ago
• ic-lab-duth / RISC-V-Vector
  Vector processor for RISC-V vector ISA
  ☆129Updated 5 years ago
• pulp-platform / FlooNoC
  A Fast, Low-Overhead On-chip Network
  ☆231Updated this week
• nishthaparashar / Floating-Point-ALU-in-Verilog
  32-Bit Algorithms of Floating Point Operations are implemented on Verilog with logic Operations.
  ☆92Updated 6 years ago
• KastnerRG / cgra4ml
  An Open Workflow to Build Custom SoCs and run Deep Models at the Edge
  ☆95Updated last week
• suoglu / Fixed-Floating-Point-Adder-Multiplier
  16-bit Adder Multiplier hardware on Digilent Basys 3
  ☆82Updated 2 years ago
• SingularityKChen / dl_accelerator
  Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions
  ☆201Updated 5 years ago
• taneroksuz / fpu
  IEEE 754 single and double precision floating point library in systemverilog and vhdl
  ☆72Updated 10 months ago
• jofrfu / tinyTPU
  Implementation of a Tensor Processing Unit for embedded systems and the IoT.
  ☆511Updated 6 years ago