Efficient FPGA-Based Accelerator for Convolutional Neural Networks
☆56Jul 31, 2024Updated last year
Alternatives and similar repositories for Efficient-FPGA-CNN-Accelerator
Users that are interested in Efficient-FPGA-CNN-Accelerator are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Eyeriss Hardware Accelerator for Machine Learning☆13May 29, 2022Updated 3 years ago
- The goal of this design is to use the PYNQ-Z2 development board to design a general convolution neural network accelerator. And through r…☆11Sep 30, 2020Updated 5 years ago
- 基于Xilinx FPGA的通用型 CNN卷积神经网络加速器，本设计基于KV260板卡，MpSoC架构均可移植☆19Dec 13, 2024Updated last year
- Hardware accelerator for convolutional neural networks☆68Aug 9, 2022Updated 3 years ago
- ☆16Jan 18, 2025Updated last year
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- A Flexible and Energy Efficient Accelerator For Sparse Convolution Neural Network☆138Jul 22, 2025Updated 8 months ago
- Designing CNN accelerator using a Xilinx FPGA board and comparing performance with CPU.☆21Feb 28, 2021Updated 5 years ago
- Eyeriss‑V1 CNN Hardware Accelerator (Verilog) fully parametric. This repository contains the complete Verilog implementation of a functio…☆28Apr 7, 2025Updated last year
- FPGA implement of 8x8 weight stationary systolic array DNN accelerator☆17Feb 27, 2021Updated 5 years ago
- bitfusion verilog implementation☆12Feb 21, 2022Updated 4 years ago
- General CNN_Accelerator design.卷积神经网络加速器设计。在PYNQ-Z2 FPGA开发板上实现了卷积池化全连接层等硬件加速计算。☆94Mar 6, 2025Updated last year
- FPGA Design of a Spiking Neural Network.☆49May 15, 2024Updated last year
- This repository hosts the code for an FPGA based accelerator for convolutional neural networks☆185Jun 20, 2024Updated last year
- CNN simd based accelerator using Vitis HLS☆11Jul 15, 2022Updated 3 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Alpha64 R10000 Two-Way Superscalar Processor☆12May 6, 2019Updated 6 years ago
- A C++ implementation of a 3 layer Gated Recurrent Unit (GRU) using no libraries other than Eigen for Matrices.☆23Jan 28, 2020Updated 6 years ago
- 基于FPGA的二维卷积识别任务☆26Apr 29, 2023Updated 2 years ago
- ES-203 Computer Organization & Architecture CNN on FPGA board☆18Feb 23, 2022Updated 4 years ago
- hardware design of universal NPU(CNN accelerator) for various convolution neural network☆171Mar 5, 2025Updated last year
- Systolic array based simple TPU for CNN on PYNQ-Z2☆45Jun 24, 2022Updated 3 years ago
- 一个基于AXI接口的PL端卷积加速器，可由PS端调用☆12Apr 15, 2023Updated 2 years ago
- Used for hardware trojan detection（Based on Trust_Hub）☆10Jul 30, 2019Updated 6 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Apr 10, 2020Updated 6 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- ☆30Jun 8, 2022Updated 3 years ago
- An open source Verilog Based LeNet-1 Parallel CNNs Accelerator for FPGAs in Vivado 2017☆25May 20, 2019Updated 6 years ago
- 2024嵌赛FPGA紫光同创赛题三——PixelFuze☆12Nov 10, 2024Updated last year
- ☆32Nov 7, 2024Updated last year
- Systolic-array based Deep Learning Accelerator generator☆29Dec 11, 2020Updated 5 years ago
- DE1SoC VGA and Audio☆10Jan 11, 2017Updated 9 years ago
- UVM Testbench for synchronus fifo☆19Aug 28, 2020Updated 5 years ago
- video stream scaler based on FPGA and verilog☆18Mar 28, 2024Updated 2 years ago
- Using Xilinx tools, the Unet architecture will be implemented and optimized for FPGA use. Some convolution-transposed conv sub-parts of t…☆18Feb 25, 2021Updated 5 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Convolutional accelerator kernel, target ASIC & FPGA☆252Apr 10, 2023Updated 3 years ago
- Minimalistic RV32I RISC-V Processor in System Verilog☆26Sep 19, 2023Updated 2 years ago
- The official implementation of HPCA 2025 paper, Prosperity: Accelerating Spiking Neural Networks via Product Sparsity☆38Aug 9, 2025Updated 8 months ago
- ☆11Dec 10, 2025Updated 4 months ago
- Matrix multiplication accelerator on ZYNQ SoC.☆12Apr 29, 2025Updated 11 months ago
- ☆63Nov 29, 2025Updated 4 months ago
- ☆11Dec 17, 2023Updated 2 years ago