gtjennings1 / JPEG_EncoderLinks
☆17Updated 7 years ago
Alternatives and similar repositories for JPEG_Encoder
Users that are interested in JPEG_Encoder are comparing it to the libraries listed below
Sorting:
- UART -> AXI Bridge☆63Updated 4 years ago
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆51Updated last year
- A set of Wishbone Controlled SPI Flash Controllers☆91Updated 3 years ago
- SDRAM controller with AXI4 interface☆98Updated 6 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆80Updated 3 years ago
- Fully parametrizable combinatorial parallel LFSR/CRC module☆158Updated 8 months ago
- Verilog SPI master and slave☆61Updated 9 years ago
- Verilog module to transmit/receive to/from RGMII compatible ethernet PHY☆30Updated 2 years ago
- A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs☆75Updated 2 years ago
- An i2c master controller implemented in Verilog☆30Updated 8 years ago
- Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.☆41Updated last month
- Small (Q)SPI flash memory programmer in Verilog☆65Updated 3 years ago
- USB 2.0 Device IP Core☆71Updated 8 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆66Updated 5 years ago
- Verilog wishbone components☆123Updated last year
- Ethernet MAC 10/100 Mbps☆84Updated 6 years ago
- HW JPEG decoder wrapper with AXI-4 DMA☆36Updated 5 years ago
- ☆31Updated 5 years ago
- ☆74Updated 3 years ago
- IP operations in verilog (simulation and implementation on ice40)☆61Updated 6 years ago
- WISHBONE SD Card Controller IP Core☆128Updated 3 years ago
- Generic FIFO implementation with optional FWFT☆60Updated 5 years ago
- RTL Verilog library for various DSP modules☆91Updated 3 years ago
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆82Updated last year
- Verilog modules required to get the OV7670 camera working☆75Updated 7 years ago
- MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.☆131Updated 5 years ago
- SPI-Flash XIP Interface (Verilog)☆46Updated 4 years ago
- TCP/IP controlled VPI JTAG Interface.☆69Updated 10 months ago
- Minimal DVI / HDMI Framebuffer☆82Updated 5 years ago
- Implementation of JESD204B Transport Layer & part of Data Link Layer☆39Updated 4 years ago