Modified the conventional JPEG compression algorithm with Lloyd-Max Quantizer. Implemented in MATLAB and tested on Xilinx Artix-7 FPGA.
☆17Aug 31, 2020Updated 5 years ago
Alternatives and similar repositories for Image-Compression
Users that are interested in Image-Compression are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Microshift Compression: An Efficient Image Compression Algorithm for Hardware☆35Apr 21, 2021Updated 4 years ago
- High-performance FPGA-based JPEG codec accelerator☆13Dec 1, 2018Updated 7 years ago
- JPEG2000 compression coder on Xilinx Virtex 5 FPGA☆17Jul 17, 2013Updated 12 years ago
- A simple JPEG2000 hardware encoder☆25Sep 29, 2020Updated 5 years ago
- ☆17Jul 23, 2018Updated 7 years ago
- 在FPGA端实现JPEG编码(开发中……☆13Oct 17, 2024Updated last year
- An FPGA-based JPEG-LS encoder, which provides lossless and near-lossless image compression with high compression ratios. 基于FPGA的JPEG-LS编码…☆309Sep 18, 2024Updated last year
- ☆13Aug 25, 2022Updated 3 years ago
- visualization program for vlp-16 based on a viz class☆11Feb 8, 2017Updated 9 years ago
- "PLI-TDC: Super Fine Delay-Time Based Physical-Layer Identification with Time-to-Digital Converter for In-Vehicle Networks" ACM ASIACCS 2…☆14Feb 11, 2026Updated last month
- Multi Layer Perceptron by Vivado HLS for Xilinx FPGA implementation☆12Dec 26, 2016Updated 9 years ago
- MathWorks-Excellence-in-Innovation/projects/Behavioral Modelling of Phase-Locked Loop using Deep Learning Techniques/☆10Feb 4, 2022Updated 4 years ago
- This is about the implementation of (2,1,4) Convolutional Encoder and Viterbi Decoder using Verilog VHDL.☆13Aug 12, 2020Updated 5 years ago
- Implementation of JPEG Compression on an FPGA☆18May 10, 2017Updated 8 years ago
- This repository contains MATLAB code which can be used to generate simulink model and HDL code for implementation on FPGA. Since HDL code…☆13May 6, 2020Updated 5 years ago
- An FPGA-based Ultra-High Throughput JPEG-LS encoder, which provides lossless image compression. 一个超高性能的FPGA JPEG-LS编码器,用来进行无损图像压缩。☆105Sep 18, 2024Updated last year
- JPEG Encoder Verilog☆81Oct 31, 2022Updated 3 years ago
- ☆14Dec 15, 2017Updated 8 years ago
- Designing and implementing LZ4 decompression algorithm in hardware (FPGA) using Verilog hardware description language☆17Feb 20, 2019Updated 7 years ago
- Verilog Model for W25Q128JVxIM Serial Flash Memory☆18Jun 7, 2020Updated 5 years ago
- A library that offers functionality to use Decawave's DW1000 chips/modules with Arduino.☆13Jan 18, 2022Updated 4 years ago
- ☆17Apr 1, 2025Updated 11 months ago
- Huffman encoding core (Vivado HLS Project)☆12Oct 15, 2019Updated 6 years ago
- The CNN based on the Xilinx Vivado HLS☆37Oct 27, 2021Updated 4 years ago
- This repository contains some introductory level review about learning about FPGA Design including some tutorials, links to websites and …☆41Apr 5, 2025Updated 11 months ago
- This library interfaces with the Texas Instruments BQ27441 Battery Fuel Gauge using i2c☆12Nov 29, 2023Updated 2 years ago
- Time to Digital Converter on an FPGA☆18Oct 8, 2020Updated 5 years ago
- Library for interfacing with Basler Cameras from Qt5/QML programs☆14May 6, 2018Updated 7 years ago
- maskcnn_benchmark based on mobilenetv2☆12Nov 11, 2019Updated 6 years ago
- Toy OFDM Communication System with FPGA☆12Dec 13, 2021Updated 4 years ago
- ☆18Jun 15, 2022Updated 3 years ago
- A design of 15-order FIR filter using Verilog, with modulation and demodulation system using MATLAB☆10Aug 15, 2020Updated 5 years ago
- ☆16Sep 26, 2022Updated 3 years ago
- Approximate arithmetic circuits for FPGAs☆13Feb 19, 2020Updated 6 years ago
- MTCNN with convolution reprogramed in c☆14Jul 25, 2019Updated 6 years ago
- ☆13May 22, 2015Updated 10 years ago
- CNN simd based accelerator using Vitis HLS☆11Jul 15, 2022Updated 3 years ago
- UART IAP Example for STM32F4☆19Jun 2, 2019Updated 6 years ago
- Unit testing for cocotb☆11Aug 6, 2023Updated 2 years ago