Full duplex version of https://github.com/KastnerRG/riffa/issues/30
☆27Oct 23, 2018Updated 7 years ago
Alternatives and similar repositories for riffa2
Users that are interested in riffa2 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- fpga i2c slave verilog hdl rtl☆16Nov 26, 2015Updated 10 years ago
- ☆14May 15, 2023Updated 3 years ago
- The RIFFA development repository☆883Jun 11, 2024Updated 2 years ago
- Modular Verilog PCIexpress Interface Components with complete MyHDL Testbench for FPGA deployment☆14Sep 17, 2019Updated 7 years ago
- ☆15Jul 28, 2016Updated 10 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- 基于FPGA-Pynq的车牌识别系统。The LPR system of FPGA-Pynq☆13Mar 22, 2019Updated 7 years ago
- 8b10b Encoder/Decoder☆13Jul 17, 2014Updated 12 years ago
- Use OpenCV DNN module to load Tiny Yolov3 weights and cfg files for detection.☆12Jul 14, 2019Updated 7 years ago
- Rust proof-of-concept for GPU waveform rendering☆13Jul 22, 2020Updated 6 years ago
- Generic slave implementation of the 1-wire protocol in C☆13Mar 3, 2019Updated 7 years ago
- ☆31Jun 13, 2021Updated 5 years ago
- 10G Ethernet MAC implementation☆25Jul 13, 2020Updated 6 years ago
- GPU-accelerated RePlAce☆14Jun 11, 2024Updated 2 years ago
- What if everything is a io_uring?☆17Nov 10, 2022Updated 3 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- 586 compatible soft core for FPGA in verilog with AXI4 interface☆16Oct 15, 2016Updated 9 years ago
- ☆12Mar 22, 2022Updated 4 years ago
- Library for reading Xilinx .bit bitstream file headers with metadata extraction☆14Apr 7, 2026Updated 6 months ago
- ☆10Mar 18, 2020Updated 6 years ago
- Code and Results for Master Thesis Project on Fixed-point Quantization of Convolutional Neural Networks for Quantized Inference on Embedd…☆13Feb 7, 2021Updated 5 years ago
- Python library for I2C-MP-USB, an USB to I²C interface☆13May 5, 2022Updated 4 years ago
- Yilong's NetFPGA-10G Repo☆13May 7, 2015Updated 11 years ago
- Interface Xilinx XDMA PCIe with DDR3 using MIG-IP on Artix-7 FPGA using Nitefury dev board☆18Apr 13, 2022Updated 4 years ago
- A simple, minimal "Hello World" template for Preact CLI for being used on a ESP8266/ESP32☆12Dec 10, 2021Updated 4 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- Multiple approaches to statistical simulation for computer architects☆15Jun 1, 2020Updated 6 years ago
- ☆14Sep 25, 2013Updated 13 years ago
- Convert miniSEED formatted data to ASCII☆15Apr 2, 2021Updated 5 years ago
- A GUI for gamma spectroscopy using a PicoScope☆11Oct 14, 2022Updated 3 years ago
- using xilinx xc6slx45 to implement mnist net☆83Jul 5, 2018Updated 8 years ago
- ☆18Apr 7, 2022Updated 4 years ago
- An Open-Source Processor for Accelerating Spiking Neural Network☆14Sep 30, 2022Updated 4 years ago
- ☆12Feb 19, 2026Updated 7 months ago
- Hardware Description Language on FPGA☆12Sep 18, 2023Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Network protocol libraries for VHDL test benches☆14Mar 9, 2026Updated 7 months ago
- Exchange messages between PRU (Programmable Real-Time Unit) and Linux System using RemoteProc and RPMsg☆11Dec 4, 2017Updated 8 years ago
- Git简易博客☆17May 1, 2022Updated 4 years ago
- ☆10Dec 29, 2015Updated 10 years ago
- The SeedLink client library☆17Aug 12, 2026Updated last month
- GNURadio implementation of the lazy Viterbi algorithm☆13May 8, 2020Updated 6 years ago
- ☆15Nov 26, 2024Updated last year