To help machines learn what we human beings are doing via a camera is important. Once it comes true, machines can make different responses to all kinds of human's postures. But the process is very difficult as well, because usually it is very slow and power-consuming, and requires a very large memory space. Here we focus on real-time posture rec…
☆55Jun 28, 2018Updated 8 years ago
Alternatives and similar repositories for posture_recognition_CNN
Users that are interested in posture_recognition_CNN are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- 在FPGA上面实现一个NPU计算单元。能够执行矩阵运算（ADD/ADDi/ADDs/MULT/MULTi/DOT等）、图像处理运算（CONV/POOL等）、非线性映射（RELU/TANH/SIGM等）。☆336Aug 16, 2018Updated 8 years ago
- ☆14Dec 17, 2015Updated 10 years ago
- This is just for Takk_Zynq_Labs test.☆27Jan 14, 2022Updated 4 years ago
- axi video dma ip in verilog☆11Aug 22, 2020Updated 6 years ago
- Human detection with HOG + SVM in MATLAB and Verilog, accelerated on a DE2-115 FPGA (0.757 ms, 54x faster than MATLAB)☆12Oct 16, 2026Updated last week
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- 基于FPGA的图像处理模块（出自于crazybingo）（将部分IP换为纯Verilog用于跨平台移植）☆53Apr 23, 2020Updated 6 years ago
- CS533 Course Project (ongoing) - Exploring Parallel Architectures for Neural Processing Unit Implementations☆22May 4, 2017Updated 9 years ago
- 第四届全国大学生嵌入式比赛SoC☆12Apr 1, 2022Updated 4 years ago
- This is Max's blog, something interesting in it.☆13Jan 1, 2023Updated 3 years ago
- RTL Design and Implementation of High Performance Algorithm Logic Units☆16Oct 1, 2019Updated 7 years ago
- A simple implementation of the Karatsuba multiplication algorithm☆12Apr 2, 2025Updated last year
- 【例程】简单的FPGA入门项目 适用于各类Cyclone 开发板☆37Dec 4, 2025Updated 10 months ago
- AXI-4 RAM Tester Component☆21Aug 5, 2020Updated 6 years ago
- 10_100_1000 Mbps tri-mode ethernet MAC☆11Jul 17, 2014Updated 12 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- This project is designed to delay the output of the video stream in AXI-STREAM format.☆13Jul 14, 2024Updated 2 years ago
- ☆18Jul 23, 2018Updated 8 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆72May 8, 2020Updated 6 years ago
- ☆10Dec 12, 2020Updated 5 years ago
- 标准视频时序生成器☆10Feb 9, 2020Updated 6 years ago
- A novel architectural design for stitching video streams in real-time on an FPGA.☆134Oct 25, 2021Updated 5 years ago
- The PE for the second generation CGRA (garnet).☆18Oct 15, 2026Updated last week
- FPGA Low latency 10GBASE-R PCS☆13May 23, 2023Updated 3 years ago
- How to use the Intel JTAG primitive without using virtual JTAG☆17Oct 31, 2021Updated 4 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- maskcnn_benchmark based on mobilenetv2☆12Nov 11, 2019Updated 6 years ago
- This repository contains code and pdf tutorial of how I've implemented binocular camera matching algorithm, SGBM, with FPGA using verilog…☆40Mar 1, 2023Updated 3 years ago
- Documentation for the entire CGRAFlow☆19Sep 17, 2021Updated 5 years ago
- An agent skill that turns an HDL / RTL / SoC architecture description into a clean SVG block diagram☆28Aug 10, 2026Updated 2 months ago
- A CNN accelerator design inspired by MIT Eyeriss project☆20Aug 14, 2021Updated 5 years ago
- 清華大學 | 積體電路設計實驗 (IC LAB) | 110上☆52Oct 14, 2022Updated 4 years ago
- Open Source SSD Controller. NVMe and Lightstor variants☆18May 21, 2014Updated 12 years ago
- using xilinx xc6slx45 to implement mnist net☆83Jul 5, 2018Updated 8 years ago
- FPGA图像处理仿真平台☆31Apr 25, 2022Updated 4 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- SystemVerilog files for lab project on a DNN hardware accelerator☆18Jun 22, 2021Updated 5 years ago
- Deep Learning Accelerator (Convolution Neural Networks)☆202Dec 15, 2017Updated 8 years ago
- AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc☆42Mar 17, 2022Updated 4 years ago
- a 2048 bit RSA verilog project basing on Montgomery , Karatsuba multiplier☆29Mar 11, 2022Updated 4 years ago
- Verilog program☆16Jul 27, 2020Updated 6 years ago
- ☆31Aug 8, 2020Updated 6 years ago
- Implementation of CNN on ZYNQ FPGA to classify handwritten numbers using MNIST database☆611Feb 19, 2021Updated 5 years ago