nvdla / vpLinks
Virtual Platform for NVDLA
☆159Updated 7 years ago
Alternatives and similar repositories for vp
Users that are interested in vp are comparing it to the libraries listed below
Sorting:
- Microarchitecture implementation of the decoupled vector-fetch accelerator☆161Updated last year
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆165Updated 3 years ago
- SystemC/C++ library of commonly-used hardware functions and components for HLS.☆288Updated 2 months ago
- Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel☆219Updated 5 years ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆114Updated 2 years ago
- Chisel implementation of the NVIDIA Deep Learning Accelerator (NVDLA), with self-driving accelerated☆234Updated last week
- Documentation for NVDLA.☆260Updated 5 months ago
- RiVEC Bencmark Suite☆126Updated last year
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆37Updated 6 years ago
- SystemC/TLM-2.0 Co-simulation framework☆263Updated 7 months ago
- DRAMSys a SystemC TLM-2.0 based DRAM simulator.☆325Updated 2 weeks ago
- ☆205Updated 2 months ago
- QEMU libsystemctlm-soc co-simulation demos.☆159Updated 7 months ago
- A matrix extension proposal for AI applications under RISC-V architecture☆156Updated 10 months ago
- FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation☆114Updated 2 years ago
- RISC-V SystemC-TLM simulator☆335Updated last month
- NVDLA modifications for GreenSocs qbox (https://git.greensocs.com/qemu/qbox)☆28Updated 7 years ago
- Advanced Interface Bus (AIB) die-to-die hardware open source☆144Updated last year
- A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.☆144Updated 8 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs (FPGA'18)☆169Updated 2 years ago
- A modeling library with virtual components for SystemC and TLM simulators☆177Updated this week
- Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)☆64Updated 2 years ago
- An open-source UCIe controller implementation☆80Updated this week
- DRAMSim2: A cycle accurate DRAM simulator☆294Updated 5 years ago
- RISC-V Virtual Prototype☆183Updated last year
- OpenSoC Fabric - A Network-On-Chip Generator☆174Updated 5 years ago
- Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy☆395Updated 2 months ago
- Tests for example Rocket Custom Coprocessors☆75Updated 5 years ago
- NVDLA SW☆511Updated 4 years ago
- CVA6 SDK containing RISC-V tools and Buildroot☆76Updated 3 weeks ago