An OpenRISC 1000 multi-core virtual platform based on SystemC/TLM
☆17Mar 25, 2025Updated last year
Alternatives and similar repositories for or1kmvp
Users that are interested in or1kmvp are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A modeling library with virtual components for SystemC and TLM simulators☆191Updated this week
- NVDLA modifications for GreenSocs qbox (https://git.greensocs.com/qemu/qbox)☆30Aug 23, 2018Updated 7 years ago
- spike-vp☆13Feb 5, 2024Updated 2 years ago
- An ARMv8 virtual platform based on QEMU and VCML☆50Apr 15, 2026Updated 2 months ago
- An Eclipse 4 RCP based GUI to interact with SystemC simulators☆15Mar 19, 2026Updated 2 months ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Qbox☆93Updated this week
- contains TLM2 based interfaces for AXI, ACE, CHI and other standard protocols☆68Jun 11, 2026Updated last week
- SystemC/TLM-2.0 Co-simulation framework☆296May 21, 2025Updated last year
- Virtual Platform for NVDLA☆164Aug 23, 2018Updated 7 years ago
- A Game Boy emulator written in C++/SystemC TLM-2.0☆36Updated this week
- The OpenRISC 1000 architectural simulator☆78Apr 27, 2025Updated last year
- SystemC UVM verification environment with Constraint Randomized stimulus, Coverage, Assertions☆21Dec 1, 2024Updated last year
- A SystemC productivity library: https://minres.github.io/SystemC-Components/☆135Jun 11, 2026Updated last week
- SystemC Reference Implementation☆667Jun 2, 2026Updated 2 weeks ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- SystemC Common Practices (SCP)☆35Feb 27, 2026Updated 3 months ago
- This tool translates synthesizable SystemC code to synthesizable SystemVerilog.☆309May 19, 2026Updated 3 weeks ago
- Modeling Architectural Platform☆226Updated this week
- Cryptography accelerator ASIC (for AES128/AES256 and SHA256) using Skywater 130nm process node (build-environment repo).☆11Jan 13, 2021Updated 5 years ago
- Vector Bazel Rules and Toolchains☆16Mar 2, 2026Updated 3 months ago
- Convert C files into Verilog☆22Jan 27, 2019Updated 7 years ago
- This specification will define the RISC-V privilege ISA extensions required to support Supervisor Domain isolation for multi-tenant secur…☆70May 25, 2026Updated 3 weeks ago
- My local copy of UVM-SystemC☆14Apr 27, 2024Updated 2 years ago
- Base on Synopsys platform using VCS,DC,ICC,PT.☆11May 29, 2021Updated 5 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- IC设计中的一些经典书籍☆13Jul 28, 2020Updated 5 years ago
- Automated Git mirror of Gaisler's GRLIB/Leon3 releases☆21Nov 2, 2025Updated 7 months ago
- RISCV-VP++ is a extended and improved successor of the RISC-V based Virtual Prototype (VP) RISC-V VP. It is maintained at the Institute f…☆57May 26, 2026Updated 3 weeks ago
- iverilog extension for Visual Studio Code to satisfy the needs for an easy testbench runner. Includes builtin GTKWave support.☆11Mar 4, 2023Updated 3 years ago
- Primitives for GF180MCU provided by GlobalFoundries.☆13Jul 6, 2025Updated 11 months ago
- Pan's 1st Gen RISC-V SoC, contains a 12T multicycle RISC-V32ia core, with an EMIF-like simple bus☆16Oct 21, 2020Updated 5 years ago
- A implementation of a 32-bit single cycle MIPS processor in Verilog.☆22Nov 23, 2020Updated 5 years ago
- submission repository for efabless mpw6 shuttle☆31Jan 10, 2024Updated 2 years ago
- d-EVD-dual-electric-vehicle-dataset☆13Apr 24, 2026Updated last month
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Custom IC Creator (ciccreator) is a compiler that takes in a object definition file (JSON), a SPICE file, and a design rule file and outp…☆40Jun 22, 2025Updated 11 months ago
- ☆10May 26, 2016Updated 10 years ago
- Lime Digital Signal Processing☆29Nov 25, 2025Updated 6 months ago
- TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems☆166May 1, 2022Updated 4 years ago
- ☆14Jul 19, 2024Updated last year
- Example RISC-V Out-of-Order/Superscalar Processor Performance Core and MSS Model☆216May 29, 2026Updated 2 weeks ago
- Learn systemC with examples☆137Dec 21, 2022Updated 3 years ago