Alternatives and similar repositories for qbox

Users that are interested in qbox are comparing it to the libraries listed below

• Xilinx / systemctlm-cosim-demo
  QEMU libsystemctlm-soc co-simulation demos.
  ☆149Updated last month
• quic / qbox
  Qbox
  ☆56Updated last week
• Arteris-IP / tlm2-interfaces
  contains TLM2 based interfaces for AXI, ACE, CHI and other standard protocols
  ☆55Updated 2 months ago
• Minres / SystemC-Components
  A SystemC productivity library: https://minres.github.io/SystemC-Components/
  ☆105Updated this week
• embecosm / esp1-systemc-tlm
  Embecosm Software Package 1: Example SystemC loosely timed TLM 2.0 models
  ☆17Updated 11 years ago
• Xilinx / pcie-model
  PCI Express controller model
  ☆57Updated 2 years ago
• riscv-boom / riscv-coremark
  Setup scripts and files needed to compile CoreMark on RISC-V
  ☆68Updated 11 months ago
• ics-jku / riscv-vp-plusplus
  RISCV-VP++ is a extended and improved successor of the RISC-V based Virtual Prototype (VP) RISC-V VP. It is maintained at the Institute f…
  ☆37Updated 2 weeks ago
• hsa-ees / paranut
  The ParaNut Processor - Highly Parallel and More Than Just a CPU Core
  ☆35Updated 2 years ago
• vherdt / riscv-vp
  RISC-V Virtual Prototype
  ☆43Updated 3 years ago
• li3tuo4 / rc-fpga-zcu
  Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)
  ☆62Updated 2 years ago
• pulp-platform / trace_debugger
  Capture retired instructions of a RISC-V Core and compress them to a sequence of packets.
  ☆19Updated last year
• riscv-admin / riscv-ovpsim
  ☆62Updated 4 years ago
• dcblack / sc-platform
  Example of a Virtual Platform implemented with Modern C++(14) and SystemC TLM-2.0
  ☆25Updated 2 years ago
• RSPwFPGAs / qemu-hdl-cosim
  VM-HDL Co-Simulation for Servers with PCIe-Connected FPGAs
  ☆47Updated 4 years ago
• socrocket / core
  SoCRocket - Core Repository
  ☆37Updated 8 years ago
• ic-lab-duth / NoCpad
  HLS for Networks-on-Chip
  ☆35Updated 4 years ago
• nvdla / tlm2c
  Backup: Library implementing a C TLM-2 style to bridge C models to SystemC TLM-2.0 (C++) from GreenSocs (https://git.greensocs.com/tlm/tl…
  ☆17Updated 6 years ago
• openhwgroup / cva6-sdk
  CVA6 SDK containing RISC-V tools and Buildroot
  ☆66Updated last year
• riscv / riscv-CMOs
  ☆86Updated 3 years ago
• dcblack / SCFTGU_BOOK
  Archives of SystemC from The Ground Up Book Exercises
  ☆31Updated 2 years ago
• westerndigitalcorporation / swerv_eh1_fpga
  FPGA reference design for the the Swerv EH1 Core
  ☆71Updated 5 years ago
• anikau31 / systemc-clang
  This is a Clang tool that parses SystemC models, and synthesizes Verilog from it.
  ☆82Updated 8 months ago
• oprecomp / DDR4_controller
  ☆59Updated 4 years ago
• plctlab / plct-gem5
  upstream: https://github.com/RALC88/gem5
  ☆31Updated 2 years ago
• AlessandroCilardo / NaplesPU
  The official NaplesPU hardware code repository
  ☆16Updated 5 years ago
• zero-day-labs / riscv-aia
  AIA IP compliant with the RISC-V AIA spec
  ☆42Updated 4 months ago
• edgarigl / tlmu
  TLMu - Transaction Level eMulator
  ☆33Updated 10 years ago
• SingularityKChen / SystemC-Training
  SystemC training aimed at TLM.
  ☆30Updated 4 years ago
• riscv-boom / fpga-zynq
  Support for Rocket Chip on Zynq FPGAs
  ☆40Updated 6 years ago