LeiWang1999 / nvdla-parser
A NVDLA Loadable Parser.
☆10Updated 2 years ago
Related projects ⓘ
Alternatives and complementary repositories for nvdla-parser
- ☆42Updated 4 years ago
- ☆30Updated last year
- NVDLA small config implementation on Zynq ZCU104 (evaluation)☆23Updated 5 years ago
- ☆16Updated 5 years ago
- Aiming at an AI Chip based on RISC-V and NVDLA.☆21Updated 6 years ago
- HLS implemented systolic array structure☆40Updated 6 years ago
- A systolic array matrix multiplier☆23Updated 5 years ago
- some sample caffemodel, prototxt, test images and pre compiled loadabes .☆12Updated 3 years ago
- ☆32Updated 5 years ago
- An OpenCL-Based FPGA Accelerator for Compressed YOLOv2☆36Updated 3 years ago
- ☆27Updated 5 years ago
- This is Max's blog, something interesting in it.☆13Updated last year
- Designs for finalist teams of the DAC System Design Contest☆35Updated 4 years ago
- ☆21Updated last month
- DAC System Design Contest 2020☆29Updated 4 years ago
- ☆69Updated last year
- This is an open CNN accelerator for everyone to use☆14Updated 5 years ago
- Cycle-accurate C++ & SystemC simulator for the RISC-V GPGPU Ventus☆19Updated 3 months ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆44Updated 2 years ago
- ☆21Updated 6 years ago
- ☆69Updated 4 years ago
- eyeriss-chisel3☆38Updated 2 years ago
- Eyeriss chip simulator☆32Updated 4 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆46Updated this week
- A parametric RTL code generator of an efficient integer MxM Systolic Array implementation for Xilinx FPGAs.☆16Updated 7 months ago
- Automatic generation of FPGA-based learning accelerators for the neural network family☆59Updated 4 years ago
- ☆33Updated 3 years ago
- A VGG accelerator by System Verilog on DE1-SoC FPGA. Row Stationary (RS) dataflow is adopted, and computations are based on fixed point 1…☆29Updated 5 years ago
- ☆23Updated 3 years ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆91Updated 5 years ago