Alternatives and similar repositories for learn-git-the-not-so-super-hard-way

Users that are interested in learn-git-the-not-so-super-hard-way are comparing it to the libraries listed below

• OpenRigil / openrigil-rtl
  Open-source RISC-V cryptographic hardware token, RTL repo
  ☆19Updated 2 years ago
• ZenithalHourlyRate / naming
  ☆11Updated last year
• meow-chip / MeowRouter
  A hardware accelerated IP packet forwarder running on programmable ICs
  ☆15Updated 2 years ago
• taoky / ayano
  Follow nginx log, and find out bad guys!
  ☆23Updated last week
• jiegec / SPECCPU2017Harmony
  Run SPEC CPU 2017 benchmark on OpenHarmony/HarmonyOS NEXT
  ☆28Updated 4 months ago
• cyyself / cyyrv64
  My RV64 CPU (Work in progress)
  ☆19Updated 2 years ago
• jiegec / kb
  My knowledge base
  ☆71Updated this week
• CircuitCoder / cidr-calc
  CIDR union / subtraction
  ☆14Updated last week
• jiegec / verilog-lang
  A hand-written recursive decent Verilog parser.
  ☆10Updated 3 years ago
• ziyao233 / barv
  RISC-V VM in Bash
  ☆29Updated 6 months ago
• CircuitCoder / mill
  RV32I by cats
  ☆15Updated 2 years ago
• dramforever / urvirt
  User-mode trap-and-emulate hypervisor for RISC-V
  ☆13Updated 3 years ago
• CircuitCoder / MeowRust
  Relaxed Rust (for cats)
  ☆14Updated 5 years ago
• dramforever / ixayoi
  (WIP) A relatively simple pipelined RISC-V core, written in Bluespec SystemVerilog
  ☆12Updated 4 years ago
• b1f6c1c4 / why-i-gave-up-using-windows
  全方位控诉Windows的使用和开发体验
  ☆12Updated 5 years ago
• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆61Updated 3 years ago
• KireinaHoro / khtcp
  PKU CompNet'19 Lab 2 - Homebrew TCP
  ☆12Updated 5 years ago
• jiegec / verilog-format
  A naive verilog/systemverilog formatter
  ☆21Updated 7 months ago
• twd2 / fpga-nat64
  A four-10gbe-port dual-stack router with IPv4 and IPv6 translation support.
  ☆30Updated 5 years ago
• z4yx / vivado-docker
  Dockerfile with Vivado for CI
  ☆27Updated 5 years ago
• thu-cs-lab / JieLabs-Web
  Backend & Frontend for JieLabs
  ☆22Updated 2 years ago
• thu-cs-lab / jieplag
  Plagiarism detection tool in Rust (inspired by Stanford Moss)
  ☆52Updated last month
• thu-cs-lab / Router-Lab-Docs
  Documentation for Router Lab
  ☆68Updated last week
• thu-cs-lab / tanlabs
  Tsinghua Advanced Networking Labs on FPGA
  ☆38Updated last year
• dramforever / finlog
  Compiling finite generators to digital logic. WIP
  ☆13Updated 5 years ago
• OSH-2024 / osh-2024.github.io
  USTC OSH 2024 Course Homepage
  ☆15Updated last year
• tuna / artwork
  tuna artwork
  ☆27Updated 3 weeks ago
• SharzyL / parenthesis-balancer
  A telegram bot to balance parenthesis in the world
  ☆15Updated 3 months ago
• dtcxzyw / static-key
  Header-only C/C++ static keys to avoid the overhead of conditional branches
  ☆14Updated last year
• b1f6c1c4 / creepy-git-repo
  A git repo that is creepy
  ☆15Updated 5 years ago