Alternatives and similar repositories for XuanTieC910

Users that are interested in XuanTieC910 are comparing it to the libraries listed below

• emmanouil-komninos / jtag_vip_uvm

  View on GitHub
  ☆12Nov 11, 2015Updated 10 years ago
• chyyuu / zCore-Design

  View on GitHub
  ☆13Jul 26, 2021Updated 4 years ago
• rcore-os / ext2-rs

  View on GitHub
  An implementation of ext2 filesystem in Rust
  ☆15Oct 8, 2021Updated 4 years ago
• ammoniak / sam3x8e

  View on GitHub
  ☆15Sep 26, 2020Updated 5 years ago
• fighter212 / ahb2apb

  View on GitHub
  this is an AHB to APB bridge with Synopsys VIP based test enviroment. RTL can be found from UVM website.
  ☆20Jul 29, 2014Updated 11 years ago
• HUST-OS / design-pattern-notes

  View on GitHub
  各类内核的设计思路
  ☆19May 19, 2021Updated 4 years ago
• rcore-os / riscv-sbi-rt

  View on GitHub
  A mininal runtime / startup for Supervisor Binary Interface (SBI) on RISC-V.
  ☆19Feb 26, 2022Updated 3 years ago
• zero-day-labs / riscv-iommu-demo

  View on GitHub
  RISC-V IOMMU Demo (Linux & Bao)
  ☆24Dec 5, 2023Updated 2 years ago
• mballance / clusterv-soc

  View on GitHub
  Quad cluster of RISC-V cores with peripherals and local memory
  ☆24Feb 3, 2022Updated 4 years ago
• GoWest279 / XuanTie-C910-FPGA

  View on GitHub
  ☆22May 18, 2022Updated 3 years ago
• jmjos / ratatoskr

  View on GitHub
  Ratatoskr NoC Simulator
  ☆29Apr 13, 2021Updated 4 years ago
• OSCPU-Zhoushan / Zhoushan

  View on GitHub
  Open Source Chip Project by University (OSCPU) - Zhoushan Core
  ☆54Jul 23, 2022Updated 3 years ago
• rcore-os / riscv

  View on GitHub
  Low level access to RISCV processors
  ☆22Oct 3, 2022Updated 3 years ago
• TianhuaTao / uCore-SMP

  View on GitHub
  A Symmetric Multiprocessing OS Kernel over RISC-V
  ☆32Jun 3, 2022Updated 3 years ago
• crusader2000 / PCIE-Transaction-Layer-Verification

  View on GitHub
  PCIe System Verilog Verification Environment developed for PCIe course
  ☆13Mar 26, 2024Updated last year
• freecores / pipelined_fft_256

  View on GitHub
  Pipelined FFT/IFFT 256 points processor
  ☆10Jul 17, 2014Updated 11 years ago
• piood / MySysY2RV

  View on GitHub
  北大编译课程实践，独立完成的C语言子集SysY编译器，实现了从C语言编译到Koopa IR，再从Koopa IR编译到RISC-V汇编的实现
  ☆34Jul 16, 2024Updated last year
• nahidrn / axi_vip_master

  View on GitHub
  Sample UVM code for axi ram dut
  ☆40Dec 14, 2021Updated 4 years ago
• kumarswamy12 / ROUTER-1-3

  View on GitHub
  verification of the basic router protocol with UVM testbech //INCLUDED WITH RTL
  ☆14Jan 4, 2019Updated 7 years ago
• kimi-michael / Ring-NoC

  View on GitHub
  a scaleable ring topology network on chip (NoC) implemented in BSV
  ☆12Oct 14, 2014Updated 11 years ago
• MargeritPierre / ESPRIT

  View on GitHub
  A generalized ESPRIT algorithm for MATLAB
  ☆15Jan 28, 2021Updated 5 years ago
• Founderroni / OP-EX-Mindustry-Mod

  View on GitHub
  ☆16Oct 24, 2021Updated 4 years ago
• raiyyanfaisal09 / Router1X3_RTL_Design

  View on GitHub
  - A 1X3 Router (capable of routing the data packets to three different clients form a single source network) was designed, including a re…
  ☆11Jun 3, 2019Updated 6 years ago
• seabeam / yuu_apb

  View on GitHub
  UVM APB VIP, part of AMBA3&AMBA4 feature supported
  ☆34Aug 24, 2020Updated 5 years ago
• hossamfadeel / Verilog-Based-NoC-Simulator

  View on GitHub
  Verilog-Based-NoC-Simulator
  ☆10May 4, 2016Updated 9 years ago
• loboris / ktool

  View on GitHub
  A Python-based cross-platform Kendryte K210 UART ISP Utility, enhanced kflash.py
  ☆37Feb 22, 2020Updated 5 years ago
• wuzhizhe / DownloadDoubanEbook

  View on GitHub
  下载豆瓣电子书
  ☆10Apr 25, 2017Updated 8 years ago
• pop-os / raspi-img

  View on GitHub
  Raspberry Pi 4 Image
  ☆12Oct 25, 2024Updated last year
• oscomp / proj4-xv6-rust

  View on GitHub
  用Rust语言重新设计与实现xv6
  ☆35Mar 7, 2022Updated 3 years ago
• SanDisk-Open-Source / riscv32-Code-density-test-bench

  View on GitHub
  Density test bench for RISCV - "Compress extension"
  ☆15Jun 21, 2021Updated 4 years ago
• OS3Lab / patch-backporting

  View on GitHub
  PORTGPT: Towards Automated Backporting Using Large Language Models(IEEE S&P2026)
  ☆30Feb 6, 2026Updated last week
• donlon / axi-dma-controller

  View on GitHub
  Ultra High Performance AXI4-based Direct Memory Access (DMA) Controller. This project was an interview assignment. Work in Progress.
  ☆13Oct 19, 2024Updated last year
• tharinduSamare / Multicore_processor_verilog_design

  View on GitHub
  This is a multi-core processor specially designed for matrix multiplication using Verilog HDL.
  ☆11Jan 8, 2022Updated 4 years ago
• nietzhuang / RISC-V-SoC-Design

  View on GitHub
  Single RISC-V CPU attached on AMBA AHB with Instruction and Data memories.
  ☆13Oct 31, 2021Updated 4 years ago
• joaocmd / vxTwitterBot

  View on GitHub
  A Discord bot that replaces twitter URLs with vxtwitter for videos and GIFs.
  ☆13Feb 25, 2023Updated 2 years ago
• himeinhardt / TuGames

  View on GitHub
  A Mathematica Package for Cooperative Game Theory
  ☆11Jun 6, 2024Updated last year
• Aquaticfuller / OpenExSys_NoC

  View on GitHub
  OpenExSys_NoC a mesh-based network on chip IP.
  ☆20Dec 1, 2023Updated 2 years ago
• IronySuzumiya / NiuDianNao

  View on GitHub
  A simple cycle-accurate DaDianNao simulator
  ☆13Mar 27, 2019Updated 6 years ago
• Stellaris-Immortal / retile

  View on GitHub
  Repository for Stellaris Immortal alpha
  ☆17May 9, 2020Updated 5 years ago