mgraczyk / coursera-vlsicad
Programming assignments for Coursera's U of I VLSI CAD: Logic to Layout
☆11Updated 10 years ago
Alternatives and similar repositories for coursera-vlsicad:
Users that are interested in coursera-vlsicad are comparing it to the libraries listed below
- An analytical VLSI placer☆28Updated 3 years ago
- Source codes and calibration scripts for clock tree synthesis☆40Updated 5 years ago
- A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).☆54Updated 2 years ago
- Intel's Analog Detailed Router☆38Updated 5 years ago
- Global Router Built for ICCAD Contest 2019☆30Updated 4 years ago
- ☆32Updated 5 years ago
- ☆20Updated 3 years ago
- Delay Calculation ToolKit☆27Updated 2 years ago
- EDA physical synthesis optimization kit☆50Updated last year
- This is the repository of IPs of the group in USC who is developing Analog Mixed-signal Parameter Search Engine (AMPSE). You can download…☆24Updated last year
- Open Source Detailed Placement engine☆36Updated 5 years ago
- Routing Visualization for Physical Design☆18Updated 6 years ago
- Open Source PHY v2☆25Updated 9 months ago
- Material for OpenROAD Tutorial at DAC 2020☆46Updated 2 years ago
- Automatic generation of real number models from analog circuits☆37Updated 10 months ago
- DATC Robust Design Flow.☆37Updated 5 years ago
- ☆40Updated 5 years ago
- Open-sourced utilities for initial flow setup, calibration, and other user functions for OpenROAD project☆19Updated 5 years ago
- Simple and most probably incomplete parser for spectre netlists☆16Updated 8 years ago
- AMC: Asynchronous Memory Compiler☆48Updated 4 years ago
- Collection of digital hardware modules & projects (benchmarks)☆41Updated 3 months ago
- Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits☆56Updated 8 months ago
- VLSI EDA Global Router☆71Updated 7 years ago
- ☆37Updated 10 months ago
- OpenDesign Flow Database☆16Updated 6 years ago
- Circuit release of the MAGICAL project☆31Updated 5 years ago
- A LEF/DEF Utility.☆27Updated 5 years ago
- Python-based Verilog Parser (currently Netlist only)☆53Updated 7 years ago
- fakeram generator for use by researchers who do not have access to commercial ram generators☆35Updated 2 years ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆79Updated last month