USB Full-Speed core written in migen/LiteX
☆17Sep 2, 2019Updated 6 years ago
Alternatives and similar repositories for valentyusb
Users that are interested in valentyusb are comparing it to the libraries listed below
Sorting:
- USB Full-Speed core written in migen/LiteX☆12Sep 19, 2019Updated 6 years ago
- Standard HyperRAM core for ECP5 written in Litex/Migen☆14Dec 6, 2019Updated 6 years ago
- RISC-V 32-bit core for MCCI Catena 4710☆10Jul 31, 2019Updated 6 years ago
- Intellikeys USB Translator☆14Nov 12, 2024Updated last year
- ☆12Apr 19, 2024Updated last year
- USB Full-Speed core written in migen/LiteX☆43Mar 14, 2019Updated 7 years ago
- ice40 USB Analyzer☆57Aug 8, 2020Updated 5 years ago
- Finding the bacteria in rotting FPGA designs.☆14Dec 28, 2020Updated 5 years ago
- Bootloader for Fomu☆105Dec 31, 2022Updated 3 years ago
- A simple script to build open-source FPGA tools.☆54Oct 25, 2022Updated 3 years ago
- There are many RISC V projects on iCE40. This one is mine.☆15Jun 25, 2020Updated 5 years ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆53Aug 7, 2023Updated 2 years ago
- The Micro Python project☆15Dec 24, 2020Updated 5 years ago
- micropython ESP32 programmer/flasher for ECP5 JTAG☆74Sep 14, 2025Updated 6 months ago
- Python library for generating USB Descriptor byte strings using `struct` only.☆16Aug 13, 2021Updated 4 years ago
- Device description files (architecture, timing, configuration bitstream, and general documentation) for EOS S3 MCU+eFPGA SoC☆27Sep 1, 2021Updated 4 years ago
- Gateware for USB2Sniffer☆30May 13, 2021Updated 4 years ago
- Cross compile FPGA tools☆21Jan 4, 2021Updated 5 years ago
- standalone python host-side module to talk to OpenVizsla devices, based on LibOV [archived]☆18Feb 1, 2024Updated 2 years ago
- Protoboard cartridge for the Hackaday 2019 Supercon badge☆17Nov 12, 2019Updated 6 years ago
- Firmware for the FX2 which emulates the FTDI serial chips (including MPSSE support).☆17Aug 7, 2018Updated 7 years ago
- iCE40HX8K development board with SRAM and bus for fast ADC, DAC, IOs☆39Nov 5, 2024Updated last year
- All Digital Radio Platform written in nmigen targeting FPGAs (for now)☆81Jun 1, 2021Updated 4 years ago
- USB 2.0 Device IP core using Migen with out-of-box AXI Slave Interface☆13Oct 24, 2017Updated 8 years ago
- USB Serial on the TinyFPGA BX☆142Jun 20, 2021Updated 4 years ago
- iCE40UP5K in an Adafruit Feather form factor☆25Aug 11, 2022Updated 3 years ago
- Small footprint and configurable Inter-Chip communication cores☆66Feb 20, 2026Updated last month
- Utilities to flash Fomu from a Raspberry Pi☆23Jan 26, 2022Updated 4 years ago
- ☆10Apr 8, 2021Updated 4 years ago
- Example projects/code for the OrangeCrab☆109May 7, 2024Updated last year
- ICE40 FPGA Cape for Beaglebone☆52Sep 14, 2020Updated 5 years ago
- An open source cross-platform UF2 bootloader based on the TinyUSB library☆28Jul 23, 2020Updated 5 years ago
- PREEMPT_RT Linux for Real-time Edge Software☆13Dec 18, 2025Updated 3 months ago
- ☆63Oct 10, 2023Updated 2 years ago
- My pergola FPGA projects☆30Jun 23, 2021Updated 4 years ago
- USB3 PIPE interface for Xilinx 7-Series☆252Jan 2, 2026Updated 2 months ago
- Design files for the CMSIS-DAP debugger☆11May 14, 2021Updated 4 years ago
- Neural network from scratch in Python using Numpy☆12May 28, 2017Updated 8 years ago
- Small micro-coded RISC-V softcore☆15Nov 27, 2018Updated 7 years ago