steveicarus / simbus
Icarus SIMBUS
☆18Updated 5 years ago
Alternatives and similar repositories for simbus:
Users that are interested in simbus are comparing it to the libraries listed below
- USB 1.1 Device IP Core☆20Updated 7 years ago
- a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface☆32Updated 3 years ago
- A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga☆26Updated 5 years ago
- Small footprint and configurable Inter-Chip communication cores☆57Updated last month
- Notes, scripts and apps to quickfeather board☆10Updated 3 years ago
- Digital Circuit rendering engine☆38Updated last year
- TLUT tool flow for parameterised configurations for FPGAs☆16Updated 8 months ago
- An example OMI Device FPGA with 2 DDR4 memory ports☆16Updated 2 years ago
- an inverter drawn in magic with makefile to simulate☆26Updated 2 years ago
- Project Trellis database☆13Updated last year
- Using VexRiscv without installing Scala☆38Updated 3 years ago
- There are many RISC V projects on iCE40. This one is mine.☆15Updated 4 years ago
- Cross compile FPGA tools☆22Updated 4 years ago
- A bit-serial CPU☆18Updated 5 years ago
- Picorv32 SoC that uses only BRAM, not flash memory☆12Updated 6 years ago
- RISC-V System on Chip Builder☆12Updated 4 years ago
- System on Chip toolkit for nMigen☆19Updated 4 years ago
- iCE40 floorplan viewer☆24Updated 6 years ago
- nextpnr portable FPGA place and route tool☆12Updated 4 years ago
- Misc open FPGA flow examples☆8Updated 5 years ago
- Ice40 open source HDMI examples on BlackIce II☆11Updated 2 years ago
- IRSIM switch-level simulator for digital circuits☆32Updated last week
- Open source hardware down to the chip level!☆30Updated 3 years ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆50Updated last year
- Co-simulation and behavioural verification with VHDL, C/C++ and Python/m☆13Updated last week
- XC2064 bitstream documentation☆16Updated 6 years ago
- GUI for SymbiYosys☆13Updated last year
- Simulation VCD waveform viewer, using old Motif UI☆25Updated 2 years ago
- Benchmarks for Yosys development☆24Updated 5 years ago
- Project Peppercorn - GateMate FPGA Bitstream Documentation☆18Updated 2 weeks ago