Alternatives and similar repositories for nscscc-wiki:

Users that are interested in nscscc-wiki are comparing it to the libraries listed below

• Silverster98 / bit_nscscc_suggestion
  为了更好地帮助后来的同学参加龙芯杯，草拟了这份建议，望对后来人有所帮助
  ☆122Updated 4 years ago
• SocialistDalao / UltraMIPS_NSCSCC
  UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.
  ☆128Updated 9 months ago
• OSCPU / ysyx
  一生一芯的信息发布和内容网站
  ☆128Updated last year
• NJU-ProjectN / nvboard
  NJU Virtual Board
  ☆263Updated 3 months ago
• NSCSCC-2020-Fudan / FDU1.1-NSCSCC
  复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品
  ☆42Updated 4 years ago
• z4yx / NaiveMIPS-HDL
  Naïve MIPS32 SoC implementation
  ☆113Updated 4 years ago
• fluctlight001 / cpu_for_nscscc2022_single
  2022年龙芯杯个人赛 单发射110M（含icache）
  ☆44Updated 2 years ago
• fluctlight001 / nscscc2022_single_tools
  龙芯杯个人赛工具包（适用于个人赛的golden_trace工具）
  ☆48Updated last year
• OSCPU / ysyx-workbench
  ☆139Updated 6 months ago
• Z-Y00 / Examples-in-book-write-your-own-cpu
  《自己动手写CPU》一书附带的文件
  ☆80Updated 7 years ago
• arch-simulator-sig / advanced-computer-architecture
  体系结构研讨 + ysyx高阶大纲 (WIP
  ☆145Updated 5 months ago
• Lyncien / RISC-V-32I
  体系结构课程实验：RISC-V 32I 流水线 CPU，实现37条指令，转发，冒险检测，Cache，分支预测器
  ☆72Updated 5 years ago
• shinezyy / micro-arch-training
  How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design
  ☆531Updated 7 months ago
• fluctlight001 / Generic-Cache-Module
  适用于龙芯杯团队赛入门选手的应急cache模块
  ☆23Updated last year
• fluctlight001 / cpu_for_nscscc2020
  2020龙芯杯个人赛 简易双发射60M（含ibuffer）
  ☆35Updated 4 years ago
• AlwenXXD / nscscc2021
  龙芯杯21个人赛作品
  ☆34Updated 3 years ago
• zach0zhang / Single_instruction_cycle_OpenMIPS
  通过学习《自己动手写CPU》，将书中实现的兼容MIPS32指令集架构的处理器——OpenMIPS（五级流水线结构），简化成单指令周期实现的处理器
  ☆195Updated 3 years ago
• xiazhuo / nscc2022_personal
  NSCSCC2022龙芯杯个人赛，MIPS32，59MHz经典五级流水线架构，易于初学者阅读（计算机组成原理，自己动手写CPU）
  ☆61Updated last year
• FDUCSLG / ICS-2021Spring-FDU
  Introduction to Computer Systems (II), Spring 2021
  ☆50Updated 3 years ago
• MaxXSoft / Fuxi
  Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.
  ☆170Updated 3 years ago
• nscscc2019ucas / nscscc2019ucas
  ☆34Updated 5 years ago
• ysyx-ta / ysyx-summer-readings
  ☆62Updated 7 months ago
• Googol2002 / NJU-ICS2021-PA
  2021年秋季学期 南京大学ICS课程 PA实验部分
  ☆125Updated 3 years ago
• nkgongxl / ucoreonrv
  ☆50Updated 4 years ago
• NJU-ProjectN / fceux-am
  ☆91Updated 4 months ago
• huang-jl / LLCL-MIPS
  LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. （第五届龙芯杯特等奖作…
  ☆34Updated 3 years ago
• Azalea8 / riscv_cpu
  riscv指令集，单周期以及五级流水线CPU
  ☆47Updated 2 months ago
• 14010007517 / 2020NSCSCC
  Chongqing University 2020 NSCSCC
  ☆28Updated 4 years ago
• CherryYang05 / OpenMIPS_CPU
  基于龙芯 OpenMIPS 实现一个具有 89 条指令的五级流水 CPU，使用 Verilog 语言，使用哈佛结构，包括逻辑移位指令、乘除法指令、加载存储指令、转移指令、协处理器访问指令以及异常相关在内的共89条指令。能够处理数据相关，包含流水线暂停以及延迟槽
  ☆20Updated 5 years ago
• name1e5s / Sirius
  Asymmetric dual issue in-order microprocessor.
  ☆34Updated 5 years ago