UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.
☆148Jun 23, 2024Updated last year
Alternatives and similar repositories for UltraMIPS_NSCSCC
Users that are interested in UltraMIPS_NSCSCC are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- HITSZ 404 NOT FOUND NSCSCC22 project☆15Sep 8, 2022Updated 3 years ago
- 复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品☆44Aug 24, 2020Updated 5 years ago
- NSCSCC 2023 The Second Prize. TEAM PUA FROM HDU.☆13Mar 29, 2025Updated last year
- NSCSCC 信息整合☆254Feb 23, 2021Updated 5 years ago
- a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog☆53Dec 11, 2023Updated 2 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- NSCSCC 2020 - Yet Another MIPS Processor☆14Aug 7, 2021Updated 4 years ago
- 2022年龙芯杯个人赛 单发射110M(含icache)☆51Aug 22, 2022Updated 3 years ago
- Pipelined Processor which implements RV32i Instruction Set. Also contains pipelined L1 4-way set-associative Instruction Cache, direct-ma…☆14Dec 23, 2022Updated 3 years ago
- High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)☆86Aug 29, 2023Updated 2 years ago
- 第六届龙芯杯混元形意太极门战队作品☆18May 15, 2022Updated 3 years ago
- CPU source code for NSCSCC 2023☆14Aug 26, 2023Updated 2 years ago
- Uranus MIPS processor by MaxXing & USTB NSCSCC team☆38Dec 14, 2019Updated 6 years ago
- 乱序双发处理器,在2024年计算机系统能力大赛CPU赛道(龙芯杯)获二等奖,全国第四☆20Aug 20, 2024Updated last year
- 龙芯杯个人赛工具包(适用于个人赛的golden_trace工具)☆65Mar 6, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- 计算机体系结构研讨课 2020年秋季 UCAS 《CPU 设计实战》 Lab11~12 & 14~15☆22Dec 22, 2020Updated 5 years ago
- Lower chisel memories to SRAM macros☆13Mar 25, 2024Updated 2 years ago
- 2020龙芯杯个人赛 简易双发射60M(含ibuffer)☆43Aug 24, 2020Updated 5 years ago
- LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. (第五届龙芯杯特等奖作…☆39Jan 26, 2022Updated 4 years ago
- CQU Dual Issue Machine☆41Jun 23, 2024Updated last year
- Chongqing University 2020 NSCSCC☆29Oct 13, 2020Updated 5 years ago
- ☆67Aug 5, 2024Updated last year
- 龙芯杯21个人赛作品☆36Sep 15, 2021Updated 4 years ago
- Our repository for NSCSCC☆21Feb 22, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- 计算机组成原理课程32位监控程序☆51Jun 2, 2020Updated 5 years ago
- NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.☆604Jul 7, 2020Updated 5 years ago
- SoC for CQU Dual Issue Machine☆12Sep 20, 2022Updated 3 years ago
- Second Prize in NSCSCC 2024. An out-of-order CPU designed by NoAXI team from HDU. 2024年全国大学生计算机系统能力大赛CPU设计赛(龙芯杯)团队赛二等奖作品☆24Sep 14, 2024Updated last year
- ☆37Jul 28, 2025Updated 9 months ago
- A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …☆121Oct 31, 2024Updated last year
- ☆14Nov 23, 2020Updated 5 years ago
- ☆35Sep 2, 2019Updated 6 years ago
- Highly configurable out-of-order MIPS32 processor, capable of booting Linux.☆40Jul 4, 2023Updated 2 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- 体系结构课程实验:RISC-V 32I 流水线 CPU,实现37条指令,转发,冒险检测,Cache,分支预测器☆87Nov 28, 2019Updated 6 years ago
- Naïve MIPS32 SoC implementation☆117Jun 23, 2020Updated 5 years ago
- verification of simple axi-based cache☆19May 14, 2019Updated 6 years ago
- Asymmetric dual issue in-order microprocessor.☆33Aug 27, 2019Updated 6 years ago
- 适用于龙芯杯团队赛入门选手的应急cache模块☆33Mar 13, 2024Updated 2 years ago
- ☆17Jul 31, 2024Updated last year
- Zircon CPU in 2024☆12Nov 21, 2025Updated 5 months ago