SocialistDalao / UltraMIPS_NSCSCC
UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.
☆122Updated 7 months ago
Alternatives and similar repositories for UltraMIPS_NSCSCC:
Users that are interested in UltraMIPS_NSCSCC are comparing it to the libraries listed below
- 2022年龙芯杯个人赛 单发射110M(含icache)☆44Updated 2 years ago
- 龙芯杯个人赛工具包(适用于个人赛的golden_trace工具)☆48Updated 10 months ago
- NSCSCC 信息整合☆226Updated 3 years ago
- 2020龙芯杯个人赛 简易双发射60M(含ibuffer)☆34Updated 4 years ago
- 为了更好地帮助后来的同学参加龙芯杯,草拟了这份建议,望对后来人有所帮助☆118Updated 4 years ago
- 复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品☆41Updated 4 years ago
- 体系结构研讨 + ysyx高阶大纲 (WIP☆133Updated 3 months ago
- High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)☆72Updated last year
- ☆61Updated 5 months ago
- ☆78Updated last month
- a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog☆46Updated last year
- NSCSCC 2023 The Second Prize. TEAM PUA FROM HDU.☆10Updated 9 months ago
- ☆32Updated last year
- ☆129Updated 5 months ago
- ☆49Updated last month
- ☆33Updated 5 years ago
- 一生一芯 , ysyx , npc . the repo of the YSYX project . a riscv-64 CPU . writing .☆25Updated 2 years ago
- 龙芯杯21个人赛作品☆34Updated 3 years ago
- 一生一芯的信息发布和内容网站☆125Updated last year
- LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. (第五届龙芯杯特等奖作…☆34Updated 3 years ago
- 体系结构课程实验:RISC-V 32I 流水线 CPU,实现37条指令,转发,冒险检测,Cache,分支预测器☆72Updated 5 years ago
- 适用于龙芯杯团队赛入门选手的应急cache模块☆21Updated 10 months ago
- A RISC-V RV32I ISA Single Cycle CPU☆22Updated last year
- NJU Virtual Board☆249Updated last month
- ☆15Updated 5 months ago
- ☆54Updated last year
- Highly configurable out-of-order MIPS32 processor, capable of booting Linux.☆37Updated last year
- Asymmetric dual issue in-order microprocessor.☆34Updated 5 years ago
- 2022龙芯杯个人赛三等奖作品☆13Updated last year
- This is my graduation project, a simple processor soft core, which implements RV32I ISA.☆14Updated 5 years ago