Alternatives and similar repositories for nscscc2018

Users that are interested in nscscc2018 are comparing it to the libraries listed below

• Maxpicca-Li / CDIM
  CQU Dual Issue Machine
  ☆38Updated last year
• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆61Updated 3 years ago
• xyongcn / LoongsonCsprj2017
  Computer System Project for Loongson FPGA Board in 2017
  ☆54Updated 7 years ago
• RickyTino / MangoMIPS32
  A softcore microprocessor of MIPS32 architecture.
  ☆40Updated last year
• cyyself / soc-simulator
  A Verilator based SoC simulator that allows you to define AXI Slave interface in software.
  ☆50Updated 2 months ago
• Superscalar-HIT-Core / Superscalar-HIT-Core-NSCSCC2020
  a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog
  ☆50Updated last year
• cnrv / RVWC2021-slides
  第一届 RISC-V 中国峰会的幻灯片等资料存放
  ☆38Updated 3 years ago
• Tang-Haojin / YuQuan
  A RISC-V core running Debian (and a LoongArch core running Linux).
  ☆22Updated 2 weeks ago
• z4yx / NaiveMIPS-HDL
  Naïve MIPS32 SoC implementation
  ☆117Updated 5 years ago
• huang-jl / LLCL-MIPS
  LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. （第五届龙芯杯特等奖作…
  ☆37Updated 3 years ago
• zencove-thu / zencove-zoom
  Highly configurable out-of-order MIPS32 processor, capable of booting Linux.
  ☆40Updated 2 years ago
• cyyself / CDIM-SoC
  SoC for CQU Dual Issue Machine
  ☆12Updated 3 years ago
• lizhirui / DreamCoreV2
  ☆22Updated 2 years ago
• nscscc2019ucas / nscscc2019ucas
  ☆35Updated 6 years ago
• jiegec / rocket-chip-vcu128
  Run Rocket Chip on VCU128
  ☆30Updated last month
• cry-daniel / Computer-Architecture-Learning
  ☆65Updated 3 years ago
• LvNA-system / labeled-RISC-V
  ☆168Updated 4 years ago
• chipsalliance / playground
  chipyard in mill :P
  ☆77Updated 2 years ago
• trivialmips / TrivialMIPS
  MIPS32 CPU implemented in SystemVerilog, with superscalar and FPU support
  ☆108Updated 6 years ago
• sequencer / arithmetic
  ☆33Updated 8 months ago
• riscv-and-rust-and-decaf / riscv32i-cpu-chisel
  riscv32i-cpu
  ☆18Updated 5 years ago
• f0rm2l1n / riscv-simulator-guide
  RISC-V模拟器，相关硬件实现`riscv-isa-sim`以及模拟器pk, bbl的指导手册
  ☆53Updated 5 years ago
• LainChip / LainCore
  Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.
  ☆45Updated last year
• name1e5s / Sirius
  Asymmetric dual issue in-order microprocessor.
  ☆33Updated 6 years ago
• nju-mips / noop-lo
  A simple OoO processor developed by njuallen and wierton, it won 2nd prize in LoongsonCup18.
  ☆30Updated 5 years ago
• XS-MLVP / UnityChipForXiangShan
  Crowdsourced Verification Project (UnityChip Verification) for the Xiangshan Processor
  ☆45Updated 3 weeks ago
• aaronshappell / tage-predictor
  SystemVerilog implemention of the TAGE branch predictor
  ☆13Updated 4 years ago
• ustb-owl / Uranus
  Uranus MIPS processor by MaxXing & USTB NSCSCC team
  ☆38Updated 5 years ago
• OSCPU / chisel-playground
  ☆68Updated 10 months ago
• OSCPU-Zhoushan / Zhoushan
  Open Source Chip Project by University (OSCPU) - Zhoushan Core
  ☆53Updated 3 years ago