cnyangkun / nscscc2018
nscscc2018
☆26Updated 6 years ago
Alternatives and similar repositories for nscscc2018:
Users that are interested in nscscc2018 are comparing it to the libraries listed below
- A softcore microprocessor of MIPS32 architecture.☆39Updated 10 months ago
- Computer System Project for Loongson FPGA Board in 2017☆52Updated 6 years ago
- National Student Computer System Capability Challenge☆9Updated 6 years ago
- ☆34Updated 5 years ago
- a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog☆47Updated last year
- A superscalar RISC-V CPU with out-of-order execution and multi-core support☆62Updated 3 years ago
- Asymmetric dual issue in-order microprocessor.☆34Updated 5 years ago
- CQU Dual Issue Machine☆36Updated 10 months ago
- A Verilator based SoC simulator that allows you to define AXI Slave interface in software.☆48Updated 6 months ago
- Highly configurable out-of-order MIPS32 processor, capable of booting Linux.☆39Updated last year
- Naïve MIPS32 SoC implementation☆114Updated 4 years ago
- 我的一生一芯项目☆16Updated 3 years ago
- SoC for CQU Dual Issue Machine☆12Updated 2 years ago
- Run Rocket Chip on VCU128☆30Updated 5 months ago
- A simple OoO processor developed by njuallen and wierton, it won 2nd prize in LoongsonCup18.☆28Updated 5 years ago
- LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. (第五届龙芯杯特等奖作…☆34Updated 3 years ago
- hardware & software prefetcher☆23Updated last year
- Hardware design with Chisel☆32Updated 2 years ago
- ☆17Updated 3 years ago
- 第一届 RISC-V 中国峰会的幻灯片等资料存放☆37Updated 2 years ago
- ☆33Updated last month
- ☆22Updated 2 years ago
- ☆36Updated 6 years ago
- Uranus MIPS processor by MaxXing & USTB NSCSCC team☆38Updated 5 years ago
- Gem5 with chinese comment and introduction (master) and some other std gem5 version.☆42Updated 3 years ago
- ☆31Updated last month
- Linux-capable out-of-order superscaler multicore LoongArch32 (LA32 / LA32R) processor.☆22Updated 8 months ago
- ☆64Updated 2 months ago
- A RISC-V core running Debian (and a LoongArch core running Linux).☆22Updated last year
- Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.☆38Updated 9 months ago