MIPS32 CPU implemented in SystemVerilog, with superscalar and FPU support
☆111Apr 29, 2019Updated 7 years ago
Alternatives and similar repositories for TrivialMIPS
Users that are interested in TrivialMIPS are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.☆608Jul 7, 2020Updated 6 years ago
- Naïve MIPS32 SoC implementation☆117Jun 23, 2020Updated 6 years ago
- Project template for Artix-7 based Thinpad board☆53Aug 3, 2026Updated 2 weeks ago
- VT220-compatible console on Cyclone IV EP4CE55F23I7☆43Jun 28, 2018Updated 8 years ago
- 计算机组成原理课程32位监控程序☆51Jun 2, 2020Updated 6 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- 奋战一学期,造台计算机(编译出的bit文件在release中,可以直接食用)☆131Nov 13, 2019Updated 6 years ago
- Tomasulo Simulator written in React as the project for Computer Architecture course, Spring 2019, Tsinghua University☆12Jun 9, 2019Updated 7 years ago
- uCore MIPS32 porting☆18Dec 16, 2019Updated 6 years ago
- Rust library for low-level abstraction of MIPS processors☆31Jun 6, 2020Updated 6 years ago
- RV32I by cats☆15Sep 4, 2023Updated 2 years ago
- My RV64 CPU (Work in progress)☆19Dec 22, 2022Updated 3 years ago
- A superscalar RISC-V CPU with out-of-order execution and multi-core support☆62Feb 17, 2022Updated 4 years ago
- Computer System Project for Loongson FPGA Board in 2017☆55Jun 3, 2018Updated 8 years ago
- My DAC '21 work open-sourced.☆14Feb 25, 2021Updated 5 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- ☆35Sep 2, 2019Updated 6 years ago
- 基于龙芯FPGA开发板的计算机综合系统实验☆26Dec 16, 2018Updated 7 years ago
- a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog☆53Dec 11, 2023Updated 2 years ago
- rCore_tutorial_tests☆11Aug 8, 2021Updated 5 years ago
- Recommended coding standard of Verilog and SystemVerilog.☆36Oct 21, 2021Updated 4 years ago
- 龙芯杯21个人赛作品☆36Sep 15, 2021Updated 4 years ago
- 为了更好地帮助后来的同学参加龙芯杯,草拟了这份建议,望对后来人有所帮助☆141Oct 24, 2020Updated 5 years ago
- High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)☆100Aug 29, 2023Updated 2 years ago
- 国科大编译作业三:Point to 分析☆18Dec 12, 2021Updated 4 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- A Verilator based SoC simulator that allows you to define AXI Slave interface in software.☆52Mar 31, 2026Updated 4 months ago
- Asymmetric dual issue in-order microprocessor.☆33Aug 27, 2019Updated 6 years ago
- NSCSCC 信息整合☆254Feb 23, 2021Updated 5 years ago
- A Symmetric Multiprocessing OS Kernel over RISC-V☆32Jun 3, 2022Updated 4 years ago
- MIPS CPU☆14Dec 10, 2020Updated 5 years ago
- A simple database engine with common SQL queries support. Final project for course 'Introduction to Databases' of Tsinghua University, Fa…☆153Jan 8, 2019Updated 7 years ago
- The GitHub repository containing all resources used in the 4th Data Prefetching Championship (DPC4), co-located with HPCA 2026.☆16Jun 9, 2026Updated 2 months ago
- Dockerfile with Vivado for CI☆27Apr 17, 2020Updated 6 years ago
- Lab for Network Principles since 2019-2020 fall☆176Sep 22, 2025Updated 10 months ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- An optimizing compiler targeting armv7 and risc-v32☆64Jan 31, 2025Updated last year
- OS Tutorial Summer of Code 2020☆19Jun 7, 2022Updated 4 years ago
- 计算机组成原理课程 RISC-V 监控程序,支持 32 位和 64 位☆127Dec 4, 2025Updated 8 months ago
- An SoC with multiple RISC-V IMA processors.☆19Aug 1, 2018Updated 8 years ago
- Tutorial for rCore OS step by step (2nd edition)☆141Dec 4, 2022Updated 3 years ago
- A database management system implemented in Rust from scratch.☆21Jul 24, 2021Updated 5 years ago
- public repository for 2020 operating system course project "riscv64-ucore"☆22Jun 5, 2020Updated 6 years ago