14010007517 / 2020NSCSCCLinks
Chongqing University 2020 NSCSCC
☆28Updated 4 years ago
Alternatives and similar repositories for 2020NSCSCC
Users that are interested in 2020NSCSCC are comparing it to the libraries listed below
Sorting:
- 复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品☆43Updated 4 years ago
- 重庆大学硬件综合设计课程实验文档☆39Updated last month
- UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.☆142Updated last year
- NSCSCC 信息整合☆251Updated 4 years ago
- ☆35Updated 5 years ago
- a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog☆49Updated last year
- 一生一芯的信息发布和内容网站☆132Updated last year
- SoC for CQU Dual Issue Machine☆12Updated 2 years ago
- 为了更好地帮助后来的同学参加龙芯杯,草拟了这份建议,望对后来人有所帮助☆126Updated 4 years ago
- 2020龙芯杯个人赛 简易双发射60M(含ibuffer)☆40Updated 4 years ago
- Asymmetric dual issue in-order microprocessor.☆34Updated 5 years ago
- MIPS 57条指令五级流水线cpu (verilog实现+详细注释)☆11Updated 3 years ago
- Introduction to Computer Systems (II), Spring 2021☆51Updated 4 years ago
- CQU Dual Issue Machine☆37Updated last year
- 2022年龙芯杯个人赛 单发射110M(含icache)☆49Updated 3 years ago
- NSCSCC 2020 - Yet Another MIPS Processor☆14Updated 4 years ago
- Computer System Project for Loongson FPGA Board in 2017☆53Updated 7 years ago
- 重庆大学计组(硬综)拓展实验;☆21Updated 4 years ago
- Uranus MIPS processor by MaxXing & USTB NSCSCC team☆38Updated 5 years ago
- High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)☆83Updated last year
- 重庆大学计算机组成原理、硬件综合设计实验材料☆38Updated 4 years ago
- A softcore microprocessor of MIPS32 architecture.☆40Updated last year
- A 5-level pipelined MIPS CPU with branch prediction and great cache.☆19Updated 4 years ago
- ☆35Updated 2 years ago
- LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. (第五届龙芯杯特等奖作…☆37Updated 3 years ago
- 龙芯杯个人赛工具包(适用于个人赛的golden_trace工具)☆61Updated last year
- 适用于龙芯杯团队赛入门选手的应急cache模块☆28Updated last year
- 体系结构课程实验:RISC-V 32I 流水线 CPU,实现37条指令,转发,冒险检测,Cache,分支预测器☆84Updated 5 years ago
- Naïve MIPS32 SoC implementation☆115Updated 5 years ago
- A Verilator based SoC simulator that allows you to define AXI Slave interface in software.☆49Updated 9 months ago