huaweicloud / huaweicloud-fpgaLinks
The official repository of the HUAWEI CLOUD FPGA Development Kit based on HUAWEI CLOUD FPGA Accelerated Cloud Server.
☆56Updated 7 years ago
Alternatives and similar repositories for huaweicloud-fpga
Users that are interested in huaweicloud-fpga are comparing it to the libraries listed below
Sorting:
- Verilog Content Addressable Memory Module☆114Updated 3 years ago
- Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"☆43Updated 5 years ago
- ☆80Updated 3 years ago
- Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks☆72Updated 8 months ago
- Open source FPGA-based NIC and platform for in-network compute☆67Updated 5 months ago
- 国产VU13P加速卡资料☆82Updated 10 months ago
- NVMe Controller featuring Hardware Acceleration☆101Updated 4 years ago
- Ethernet switch implementation written in Verilog☆57Updated 2 years ago
- Ethernet MAC IP Core for 100G/50G/40G/25G/10Gbps☆46Updated 2 years ago
- PCI express simulation framework for Cocotb☆187Updated 4 months ago
- RTL Verilog library for various DSP modules☆93Updated 3 years ago
- Gigabit MAC + UDP/TCP/IP offload Engine☆35Updated 6 years ago
- Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack☆134Updated 4 years ago
- Distributed Accelerator OS☆63Updated 3 years ago
- Ethernet MAC 10/100 Mbps☆83Updated 6 years ago
- Simple hash table on Verilog (SystemVerilog)☆51Updated 9 years ago
- Verilog Ethernet Switch (layer 2)☆51Updated 2 years ago
- This repo contains the Limago code☆90Updated 8 months ago
- 学习AXI接口,以及xilinx DDR3 IP使用☆39Updated 8 years ago
- Ethernet 10GE MAC☆45Updated 11 years ago
- Verilog Ethernet components for FPGA implementation☆22Updated 2 years ago
- PCI Express controller model☆71Updated 3 years ago
- An FPGA-based GZIP (Deflate algorithm) compressor, which inputs raw data and outputs standard GZIP format (as known as .gz file format). …☆147Updated 2 years ago
- ☆70Updated 4 years ago
- ☆34Updated 4 years ago
- Gigabit Ethernet UDP communication driver☆80Updated 6 years ago
- Hardware Assisted IEEE 1588 IP Core☆30Updated 11 years ago
- HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.☆84Updated 7 years ago
- AXI Interface Nand Flash Controller (Sync mode)☆100Updated last year
- Example designs for FPGA Drive FMC☆284Updated last year