(RETIRED see https://github.com/analogdevicesinc/hdl instead) FPGA interface reference designs for Analog Devices mixed signal IC products
☆91Sep 12, 2018Updated 7 years ago
Alternatives and similar repositories for fpgahdl_xilinx
Users that are interested in fpgahdl_xilinx are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- HDL libraries and projects☆1,883Updated this week
- MATLAB-based FIR filter and profile designer☆10Jan 25, 2017Updated 9 years ago
- Verilog IP Cores & Tests☆13May 3, 2018Updated 7 years ago
- File editor for the Xilinx AXI Traffic Generator IP☆17Feb 9, 2026Updated last month
- MATLAB-based FIR filter design☆63Sep 6, 2024Updated last year
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Extensible FPGA control platform☆62Apr 28, 2023Updated 2 years ago
- Deprecated ADI fork ➡️ analogdevicesinc/u-boot☆18Updated this week
- Xilinx Virtual Cable server written in python connecting Xilinx with different JTAG adapters☆11Dec 20, 2013Updated 12 years ago
- ☆24Sep 23, 2015Updated 10 years ago
- IP Cores that can be used within Vivado☆27May 18, 2021Updated 4 years ago
- Scripts and tools created by ADI to be used with MATLAB and Simulink with ADI products☆80Feb 1, 2021Updated 5 years ago
- fpga for utrasound mobile device☆13Aug 10, 2015Updated 10 years ago
- ☆19Oct 11, 2023Updated 2 years ago
- A PYNQ overlay demonstrating the Xilinx RFSoC SD-FEC☆13Jun 29, 2022Updated 3 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- Verilog FT245 to AXI stream interface☆29Jun 20, 2018Updated 7 years ago
- ☆17Aug 18, 2020Updated 5 years ago
- FPGA-based AI for Super Mario Bros. Designed for an Altera DE2☆35May 13, 2013Updated 12 years ago
- A FPGA accelerated SDR receiver using PYNQ-Z2 board and RTL-SDR☆23Oct 22, 2019Updated 6 years ago
- Xilinx IP repository☆13May 5, 2018Updated 7 years ago
- RMII Firewall FPGA☆25Dec 2, 2019Updated 6 years ago
- AXI Stream UART (verilog)☆12Oct 3, 2019Updated 6 years ago
- Upstream focused ADI Buildroot fork. See analogdevicesinc/br2-external for ADI releases☆53Mar 6, 2026Updated 3 weeks ago
- PS/2 Keyboard IP written in VHDL for Xilinx FPGA☆17Jul 11, 2015Updated 10 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- the actual epiphany backend☆20May 18, 2013Updated 12 years ago
- Open source FPGA-based NIC and platform for in-network compute☆67Aug 21, 2025Updated 7 months ago
- Verilog wishbone components☆125Jan 5, 2024Updated 2 years ago
- Open Source Audio DSP Platform☆25May 10, 2014Updated 11 years ago
- 16QAM modulation and demodulation by Verilog☆22Jan 4, 2021Updated 5 years ago
- Freecores website☆19Dec 22, 2016Updated 9 years ago
- A lightweight Ethernet MAC Controller IP for FPGA prototyping☆14Oct 19, 2020Updated 5 years ago
- meta-petalinux distro layer supporting Xilinx Tools☆101Nov 20, 2025Updated 4 months ago
- Memory Compiler Tutorial☆14Oct 7, 2020Updated 5 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- This document adopts the method from the XAPP1230 for doing readback capture on Xilinx UltraScale devices and shows how to migrate the sa…☆18Nov 15, 2019Updated 6 years ago
- SDR-Transceiver☆10Dec 30, 2019Updated 6 years ago
- MATLAB bindings for libiio☆13Oct 29, 2019Updated 6 years ago
- FreeSRP Hardware☆22Jun 11, 2017Updated 8 years ago
- IP Catalog for Raptor.☆18Dec 6, 2024Updated last year
- ☆12Jul 20, 2022Updated 3 years ago
- 本信号处理板主要由FPGA芯片和CYUSB3.0 芯片组成,其中FPGA模块主要完成与相关外设的交互，CYUSB3.0主要完成协议数据的传输。 2.2.1 FPGA模块 处理流程： 1. 链路初始化： 在上位机完成USB固件的下载，并读取…☆30Nov 9, 2015Updated 10 years ago