Xilinx PCIe to MIG DDR4 example designs and custom part data files
☆40Jun 10, 2026Updated 2 months ago
Alternatives and similar repositories for Custom_Part_Data_Files
Users that are interested in Custom_Part_Data_Files are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Golang package for PCI Express data transfers☆13Apr 24, 2018Updated 8 years ago
- SQRL FK33 board files, example designs and scripts.☆21Nov 7, 2022Updated 3 years ago
- SQRL Port of ethminer☆11Feb 1, 2021Updated 5 years ago
- 国产VU13P加速卡资料☆86Mar 17, 2025Updated last year
- Vivado board files for the Kintex 7 HPC V2 FPGA board.☆25Jul 31, 2020Updated 6 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- The official repository of the HUAWEI CLOUD FPGA Development Kit based on HUAWEI CLOUD FPGA Accelerated Cloud Server.☆57Nov 29, 2018Updated 7 years ago
- Checksum plays a key role in the TCP/IP headers. In this repo you'll find a efficient FPGA-based solution for a 512-bit AXI4-Stream inter…☆19Aug 28, 2019Updated 7 years ago
- Run ethash opencl kernel on Xilinx's Alveo U50☆17Mar 4, 2021Updated 5 years ago
- ☆19Oct 5, 2020Updated 5 years ago
- ☆10May 20, 2022Updated 4 years ago
- Releases for the NextJTAG tool☆24Jan 26, 2022Updated 4 years ago
- Example design for the Ethernet FMC using an FPGA based hardware packet generator/checker to demonstrate maximum throughput☆12Jul 7, 2026Updated last month
- ☆93May 4, 2017Updated 9 years ago
- Distributed Accelerator OS☆70Apr 6, 2022Updated 4 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- The official repository of the local FPGA Development Kit.☆23Apr 30, 2019Updated 7 years ago
- LIS Network-on-Chip Implementation☆34Aug 29, 2016Updated 10 years ago
- Demonstration of a video processing design for the Digilent Zybo, using Web Camera for input and VGA interface for output.☆26Aug 28, 2016Updated 10 years ago
- ☆56Dec 10, 2019Updated 6 years ago
- An open source FPGA miner for Blakecoin☆53Sep 22, 2014Updated 11 years ago
- an sata controller using smallest resource.☆17Feb 5, 2014Updated 12 years ago
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Aug 26, 2024Updated 2 years ago
- Plug & Play.☆57Jun 26, 2026Updated 2 months ago
- Extensible FPGA control platform☆63Apr 28, 2023Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Verilog based FPGA Design of SHA256 Simulated on ModelSim☆24May 18, 2018Updated 8 years ago
- Mining CryptoNight Haven on the Varium C1100☆10Apr 1, 2022Updated 4 years ago
- Open FPGA Modules☆26Oct 8, 2024Updated last year
- A collection of Opal Kelly provided design resources☆19Jun 15, 2026Updated 2 months ago
- corundum work on vu13p☆23Nov 10, 2023Updated 2 years ago
- hdmi-ts Project☆13Jun 11, 2017Updated 9 years ago
- Groundhog - Serial ATA Host Bus Adapter☆24Jun 10, 2018Updated 8 years ago
- ☆22Jul 28, 2016Updated 10 years ago
- UVM testbench for verifying the Pulpino SoC☆14Mar 23, 2020Updated 6 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- Verilog Content Addressable Memory Module☆118Mar 2, 2022Updated 4 years ago
- double_fpu_verilog☆21Jul 17, 2014Updated 12 years ago
- Blackwire SpinalHDL components implementing WireGuard primitives☆16Aug 16, 2023Updated 3 years ago
- ☆28Updated this week
- Wraps the NVDLA project for Chipyard integration☆24Sep 2, 2025Updated 11 months ago
- H265 decoder write in verilog, verified on Xilinx ZYNQ7035☆85Sep 2, 2021Updated 4 years ago
- HW JPEG decoder wrapper with AXI-4 DMA☆40Oct 25, 2020Updated 5 years ago