Alternatives and similar repositories for CuckooHashingHLS:

Users that are interested in CuckooHashingHLS are comparing it to the libraries listed below

• acsl-technion / ntl
  Networking Template Library for Vivado HLS
  ☆28Updated 4 years ago
• NetTLP / adapter
  An FPGA-based NetTLP adapter
  ☆25Updated 5 years ago
• Xilinx / open-nic-dpdk
  DPDK Drivers for AMD OpenNIC
  ☆24Updated last year
• fpgasystems / Centaur
  Centaur, a framework for hybrid CPU-FPGA databases
  ☆27Updated 8 years ago
• lewiz-support / LMAC_CORE2
  LeWiz Communications Ethernet MAC Core2 10G/5G/2.5G/1G
  ☆36Updated 2 years ago
• RSPwFPGAs / virtio-fpga
  A platform for emulating Virtio devices with FPGAs
  ☆25Updated 4 years ago
• UofT-HPRC / fpga-bpf
  A versatile Wireshark-compatible packet filter, capable of 100G speeds and higher. Also known as FFShark
  ☆48Updated 3 years ago
• grg / parser-gen
  Network packet parser generator
  ☆51Updated 4 years ago
• RSPwFPGAs / opae-xilinx
  OPAE porting to Xilinx FPGA devices.
  ☆39Updated 4 years ago
• fpgasystems / dma-driver
  ☆20Updated 6 years ago
• riscveval / Rocket-Chip
  ☆23Updated 7 years ago
• engjefersonsantiago / P4HLS
  P4 compatible HLS modules
  ☆11Updated 7 years ago
• corundum / verilog-pcie
  Verilog PCI express components
  ☆22Updated last year
• merledu / OpenTCAM
  An open-source Ternary Content Addressable Memory (TCAM) compiler.
  ☆28Updated 9 months ago
• Xilinx / HLS_packet_processing
  ☆46Updated 5 years ago
• hpcn-uam / efficient_checksum-offload-engine
  Checksum plays a key role in the TCP/IP headers. In this repo you'll find a efficient FPGA-based solution for a 512-bit AXI4-Stream inter…
  ☆17Updated 5 years ago
• pcie-bench / pciebench-netfpga
  pcie-bench code for NetFPGA/VCU709 cards
  ☆35Updated 6 years ago
• Xilinx / AlveoLink
  This repository contains IPs, Vitis kernels and software APIs that can be leveraged by Vitis users to build scale-out solutions on multip…
  ☆20Updated 2 years ago
• strezh / XPDMA
  PCIe DMA Subsystem based on Xilinx XAPP1171
  ☆46Updated last year
• luinaudt / deparser
  ☆16Updated 3 years ago
• RSPwFPGAs / qemu-hdl-cosim
  VM-HDL Co-Simulation for Servers with PCIe-Connected FPGAs
  ☆47Updated 4 years ago
• johan92 / fpga-hash-table
  Simple hash table on Verilog (SystemVerilog)
  ☆49Updated 9 years ago
• ucb-ee290c / fa18-smartnic
  SmartNIC
  ☆14Updated 6 years ago
• mcjtag / tcam
  TCAM (Ternary Content-Addressable Memory) in Verilog
  ☆48Updated last year
• slaclab / axi-pcie-core
  ☆21Updated this week
• m-asiatici / MSHR-rich
  A multi-banked non-blocking cache that handles efficiently thousands of outstanding misses, especially suited for bandwidth-bound latency…
  ☆19Updated 4 years ago
• alexforencich / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆62Updated 6 months ago
• pgroupATusc / fasthash
  Source Code for the paper Titled FASTHash: FPGA-Based High Throughput Parallel Hash Table published in ISC high performance 2020
  ☆23Updated 3 years ago
• RoaLogic / Hamming-ECC
  Hamming ECC Encoder and Decoder to protect memories
  ☆32Updated 3 months ago
• lucasbrasilino / net2axis
  Verilog network module. Models network traffic from pcap to AXI-Stream
  ☆23Updated 4 years ago