Alternatives and similar repositories for tonic

Users that are interested in tonic are comparing it to the libraries listed below

• acsl-technion / nica
  An infrastructure for inline acceleration of network applications
  ☆30Updated 4 years ago
• multitenancy-project / menshen
  ☆53Updated 3 years ago
• vishal1303 / PIEO-Scheduler
  A Fast, Scalable and Programmable Packet Scheduler in Hardware
  ☆37Updated 6 years ago
• l-nic / chipyard
  An Agile Chisel-Based SoC Design Framework
  ☆26Updated 3 years ago
• utnslab / RingleaderNIC
  ☆15Updated 2 years ago
• tcp-acceleration-service / FlexTOE
  Flexible, high-performance TCP offload to SmartNICs using fine-grained parallelism
  ☆60Updated 3 years ago
• WukLab / Clio
  Clio, ASPLOS'22.
  ☆78Updated 3 years ago
• axbryd / FlowBlaze
  FlowBlaze: Stateful Packet Processing in Hardware
  ☆72Updated 3 years ago
• pcie-bench / pcie-model
  ☆71Updated 9 months ago
• axbryd / hXDP-Artifacts
  ☆60Updated 5 years ago
• programmable-scheduling / pifo-hardware
  ☆34Updated 9 years ago
• NetSys / irn-vivado-hls
  IRN's packet processing logic synthesized using Xilinx Vivado HLS
  ☆23Updated 6 years ago
• RC4ML / RPCNIC
  RPCNIC: A High-Performance and Reconfigurable PCIe-attached RPC Accelerator [HPCA2025]
  ☆13Updated 11 months ago
• axbryd / warp-artifacts
  Artifacts for ATC '22 paper "Faster Software Packet Processing on FPGA NICs with eBPF Program Warping"
  ☆18Updated 3 years ago
• RC4ML / FpgaNIC
  FpgaNIC is an FPGA-based Versatile 100Gb SmartNIC for GPUs [ATC 22]
  ☆136Updated 2 years ago
• Xilinx / RecoNIC
  RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.
  ☆152Updated 8 months ago
• spcl / pspin
  PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing
  ☆105Updated 2 years ago
• ucsdsysnet / Rosebud
  Framework for FPGA-accelerated Middlebox Development
  ☆48Updated 2 years ago
• packet-transactions / banzai
  A machine model for line-rate programmable switches
  ☆25Updated 9 years ago
• NetFPGA / NetFPGA-PLUS
  ☆53Updated last year
• wegul / EDM
  An EDM-enabled PHY + a rack-level network simulator
  ☆11Updated 11 months ago
• mangpo / floem
  Programming system for NIC-accelerated network applications
  ☆28Updated 7 years ago
• p4fpga / p4fpga
  P4-14/16 Bluespec Compiler
  ☆89Updated 7 years ago
• crossroadsfpga / enso
  Ensō is a high-performance streaming interface for NIC-application communication.
  ☆76Updated 2 months ago
• HKUST-SING / srnic-simulation-public
  ☆20Updated 2 years ago
• Winters123 / FastRMT
  Orignal code/dev history for Menshen paper (NSDI 2022), see https://github.com/multitenancy-project/menshen for official version.
  ☆30Updated 3 years ago
• anirudhSK / drmt
  ☆15Updated 8 years ago
• FAST-UIUC / iat-pqos
  Enhanced PQOS (Intel RDT Software) with DDIO-related Functionalities
  ☆16Updated 3 years ago
• barabanshek / Dagger
  HW/SW co-designed end-host RPC stack
  ☆20Updated 4 years ago
• zainryan / INSIDER-System
  An FPGA-based full-stack in-storage computing system.
  ☆38Updated 5 years ago