minmit / tonic
A Programmable Hardware Architecture for Network Transport Logic
☆34Updated 3 years ago
Related projects ⓘ
Alternatives and complementary repositories for tonic
- An infrastructure for inline acceleration of network applications☆30Updated 3 years ago
- ☆43Updated 2 years ago
- A Fast, Scalable and Programmable Packet Scheduler in Hardware☆37Updated 5 years ago
- An Agile Chisel-Based SoC Design Framework☆26Updated 2 years ago
- ☆12Updated last year
- ☆30Updated 8 years ago
- IRN's packet processing logic synthesized using Xilinx Vivado HLS☆21Updated 5 years ago
- Modifications to GEM5 for running kernel bypass networking. (DPDK)☆15Updated last year
- Flexible, high-performance TCP offload to SmartNICs using fine-grained parallelism☆56Updated 2 years ago
- ☆55Updated 4 months ago
- ☆47Updated 3 months ago
- Clio, ASPLOS'22.☆71Updated 2 years ago
- ☆15Updated last year
- ☆57Updated 4 years ago
- ☆10Updated 5 months ago
- Framework for FPGA-accelerated Middlebox Development☆39Updated last year
- Benchmark Suite for RDMA Performance Isolation☆35Updated last year
- Orignal code/dev history for Menshen paper (NSDI 2022), see https://github.com/multitenancy-project/menshen for official version.☆22Updated 2 years ago
- ☆16Updated 3 years ago
- ☆20Updated 3 months ago
- Enhanced PQOS (Intel RDT Software) with DDIO-related Functionalities☆15Updated 2 years ago
- HW/SW co-designed end-host RPC stack☆19Updated 3 years ago
- RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.☆103Updated 2 weeks ago
- FlowBlaze: Stateful Packet Processing in Hardware☆66Updated last year
- ☆14Updated 7 years ago
- ☆23Updated 3 years ago
- ESnet SmartNIC hardware design repository.☆41Updated this week
- ☆29Updated 2 weeks ago
- NetLock: Fast, Centralized Lock Management Using Programmable Switches☆30Updated 4 years ago
- ☆22Updated 3 years ago