fpgasystems / fpga-hyperloglog
FPGA-based HyperLogLog Accelerator
☆12Updated 4 years ago
Alternatives and similar repositories for fpga-hyperloglog:
Users that are interested in fpga-hyperloglog are comparing it to the libraries listed below
- Languages, Tools, and Techniques for Accelerator Design☆33Updated 3 years ago
- Memory consistency modelling using Alloy☆29Updated 4 years ago
- Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)☆31Updated 11 months ago
- Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)☆40Updated last week
- Benchmark suite containing cache filtered traces for use with Ramulator. These include some of the workloads used in our SIGMETRICS 2019 …☆22Updated 4 years ago
- Wrapper for ETH Ariane Core☆19Updated last month
- GenStore is the first in-storage processing system designed for genome sequence analysis that greatly reduces both data movement and comp…☆13Updated 3 years ago
- Virtualized Accelerator Orchestration for Multi-Tenant Workloads☆12Updated 5 months ago
- FPGA synthesis tool powered by program synthesis☆41Updated this week
- A Rocket-based RISC-V superscalar in-order core☆31Updated last week
- SMASH is a hardware-software cooperative mechanism that enables highly-efficient indexing and storage of sparse matrices. The key idea of…☆16Updated 4 years ago
- Chisel library for Unum Type-III Posit Arithmetic☆37Updated 3 weeks ago
- ☆11Updated 2 years ago
- Manythread RISC-V overlay for FPGA clusters☆36Updated 2 years ago
- doppioDB - A hardware accelerated database☆49Updated 7 years ago
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Updated 7 months ago
- Heterogeneous Accelerated Computed Cluster (HACC) Resources Page☆21Updated this week
- ☆40Updated 3 years ago
- ETHZ Heterogeneous Accelerated Compute Cluster.☆33Updated 3 weeks ago
- HeteroCL-MLIR dialect for accelerator design☆40Updated 7 months ago
- Polyhedral High-Level Synthesis in MLIR☆30Updated 2 years ago
- A Language for Closed-form High-level ARchitecture Modeling☆20Updated 5 years ago
- Floating point modules for CHISEL☆32Updated 10 years ago
- Tutorial Material from the SST Team☆19Updated 11 months ago
- ☆29Updated 5 years ago
- A toy compiler for NumPy array expressions that uses e-graphs and MLIR☆41Updated last week
- ☆25Updated 2 years ago
- Linux source code for ISCA 2020 paper "Enhancing and Exploiting Contiguity for Fast Memory Virtualization"☆18Updated 4 years ago
- PolyGen is a code generator for the polyhedral model, written and proved in Coq.☆10Updated 4 years ago
- Tools and experiments for 0sim. Simulate system software behavior on machines with terabytes of main memory from your desktop.☆21Updated 4 years ago