fpgasystems / GPU-FPGA-Recommendation-System
FleetRec: Large-Scale Recommendation Inference on Hybrid GPU-FPGA Clusters
☆15Updated 3 years ago
Related projects ⓘ
Alternatives and complementary repositories for GPU-FPGA-Recommendation-System
- PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems☆43Updated 3 years ago
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆29Updated 2 years ago
- ☆23Updated 3 years ago
- Domain-Specific Architecture Generator 2☆20Updated 2 years ago
- MLSys 2021 paper: MicroRec: efficient recommendation inference by hardware and data structure solutions☆15Updated 3 years ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆80Updated last month
- ☆21Updated last month
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆39Updated 4 years ago
- FPGA version of Rodinia in HLS C/C++☆31Updated 3 years ago
- DASS HLS Compiler☆27Updated last year
- cycle accurate Network-on-Chip Simulator☆25Updated last year
- Centaur, a framework for hybrid CPU-FPGA databases☆27Updated 7 years ago
- Introductory examples for using PYNQ with Alveo☆48Updated last year
- HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration☆15Updated 4 years ago
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆21Updated 3 years ago
- A multi-banked non-blocking cache that handles efficiently thousands of outstanding misses, especially suited for bandwidth-bound latency…☆18Updated 3 years ago
- A simple MIPS-like CPU demo in C++ for Xilinx Vivado HLS☆18Updated 5 years ago
- Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)☆36Updated this week
- AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…☆21Updated last month
- corundum work on vu13p☆17Updated last year
- The gem5-X open source framework (based on the gem5 simulator)☆38Updated last year
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Updated 2 months ago
- Contains FPGA benchmarks for Vivado HLS and Catapult HLS☆24Updated 4 years ago
- ☆27Updated 5 years ago
- NOCulator is a network-on-chip simulator providing cycle-accurate performance models for a wide variety of networks (mesh, torus, ring, h…☆22Updated last year
- CGRA framework with vectorization support.☆19Updated this week
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆28Updated last year
- ☆13Updated last year
- Source Code for the paper Titled FASTHash: FPGA-Based High Throughput Parallel Hash Table published in ISC high performance 2020☆20Updated 2 years ago
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 4 years ago