Small footprint and configurable Inter-Chip communication cores
☆66May 19, 2026Updated this week
Alternatives and similar repositories for liteiclink
Users that are interested in liteiclink are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Small footprint and configurable embedded FPGA logic analyzer☆203May 11, 2026Updated 2 weeks ago
- Small footprint and configurable JESD204B core☆54May 11, 2026Updated 2 weeks ago
- Cross compile FPGA tools☆21Jan 4, 2021Updated 5 years ago
- Small footprint and configurable SDCard core☆139May 11, 2026Updated 2 weeks ago
- Small footprint and configurable Ethernet core☆283Updated this week
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- ice40 UltraPlus demos☆16Oct 4, 2019Updated 6 years ago
- Small footprint and configurable DRAM core☆502May 12, 2026Updated last week
- Small footprint and configurable SATA core☆164May 11, 2026Updated 2 weeks ago
- ☆13Feb 8, 2021Updated 5 years ago
- USB3 PIPE interface for Xilinx 7-Series☆260Apr 3, 2026Updated last month
- Small footprint and configurable HyperBus core☆14Jul 6, 2022Updated 3 years ago
- a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface☆31Dec 6, 2021Updated 4 years ago
- Icarus SIMBUS☆21Nov 6, 2019Updated 6 years ago
- Picorv32 SoC that uses only BRAM, not flash memory☆13Nov 27, 2018Updated 7 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Small footprint and configurable PCIe core☆695Updated this week
- An experiment for building gateware for the axiom micro / beta using amaranth-hdl☆45May 25, 2025Updated last year
- Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe☆102May 16, 2023Updated 3 years ago
- ☆11Dec 18, 2017Updated 8 years ago
- Protoboard cartridge for the Hackaday 2019 Supercon badge☆17Nov 12, 2019Updated 6 years ago
- I want to learn [n]Migen.☆44Jan 26, 2020Updated 6 years ago
- Standard HyperRAM core for ECP5 written in Litex/Migen☆14Dec 6, 2019Updated 6 years ago
- 妖刀夢渡☆63Apr 2, 2019Updated 7 years ago
- ☆15Nov 28, 2020Updated 5 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- TLUT tool flow for parameterised configurations for FPGAs☆17Aug 5, 2024Updated last year
- Pmod™ Compatible USB ULPI PHY☆14Apr 30, 2022Updated 4 years ago
- Small footprint and configurable video cores (Deprecated)☆74Sep 15, 2021Updated 4 years ago
- Collection of test cases for Yosys☆17Jan 4, 2022Updated 4 years ago
- Extensible FPGA control platform☆63Apr 28, 2023Updated 3 years ago
- USB Full-Speed core written in migen/LiteX☆17Sep 2, 2019Updated 6 years ago
- A Vivado IP package of the PicoRV32 RISC-V processor☆15Jul 9, 2020Updated 5 years ago
- ☆26Sep 27, 2018Updated 7 years ago
- ☆45May 8, 2020Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Xilinx Unisim Library in Verilog☆89Jul 22, 2020Updated 5 years ago
- Fibre Channel / FICON HBA implemented on FPGA☆40May 9, 2021Updated 5 years ago
- Notes on/tools for/new firmware for (?) a PDC002 USB PD cable☆17Apr 8, 2021Updated 5 years ago
- ☆18Sep 16, 2020Updated 5 years ago
- Minimal RISC-V RV32I CPU design as described in a companion blog post.☆13Jun 14, 2020Updated 5 years ago
- EasyNIC: an easy-to-use host interface for network cards☆43May 30, 2018Updated 7 years ago
- IP cores for the FPGA Libre project☆12Aug 7, 2017Updated 8 years ago