SpinalHDL / SpinalBaseProject-OLD-Links
☆10Updated 8 years ago
Alternatives and similar repositories for SpinalBaseProject-OLD-
Users that are interested in SpinalBaseProject-OLD- are comparing it to the libraries listed below
Sorting:
- Next-Generation FPGA Place-and-Route☆10Updated 7 years ago
- Board and connector definition files for nMigen☆30Updated 5 years ago
- HDMI core in Chisel HDL☆53Updated last year
- A reimplementation of a tiny stack CPU☆86Updated 2 years ago
- Verilog FPGA Parts Library. Old Octavo soft-CPU project.☆76Updated 6 years ago
- Icarus SIMBUS☆20Updated 6 years ago
- Yosys Plugins☆22Updated 6 years ago
- Open Processor Architecture☆26Updated 9 years ago
- A cross platform, formally verified, open source, hyperRAM controller with simulator☆14Updated 6 years ago
- Resource-efficient 16-bit CPU architecture for FPGA control plane☆96Updated 11 months ago
- Open source fpga project leveraging vtr CAD flow.☆26Updated 2 years ago
- iCE40 floorplan viewer☆24Updated 7 years ago
- Where Arty S7 projects are kept. MIT License unless file headers state otherwise.☆23Updated 6 years ago
- Example of how to use UVM with Verilator☆34Updated 2 months ago
- Docker Development Environment for SpinalHDL☆20Updated last year
- Tools and Examples for IcoBoard☆80Updated 4 years ago
- Accelerating a Classic 3D Video Game (The DOOM) on Heterogeneous Reconfigurable MPSoCs☆20Updated 5 years ago
- Cross compile FPGA tools☆21Updated 5 years ago
- DVI video out example for prjtrellis☆17Updated 7 years ago
- Project aimed at implementing floating point operators using the DSP48E1 slice.☆30Updated 12 years ago
- A tiny POWER Open ISA soft processor written in Chisel☆113Updated 2 years ago
- A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems☆45Updated 3 years ago
- Opensource building blocks for TinyFPGA microcontrollers and retro computers.☆17Updated 8 years ago
- This is a higan/Verilator co-simulation example/framework☆51Updated 7 years ago
- DDR3 controller for nMigen (WIP)☆14Updated 2 years ago
- SPI core☆14Updated 6 years ago
- lightweight open HLS for FPGA rapid prototyping☆20Updated 7 years ago
- FPGA config visualized. demo:☆20Updated 5 years ago
- iDEA FPGA Soft Processor☆16Updated 9 years ago
- Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentaion (Reverse Engineered)☆34Updated 4 years ago