litex-hub / litevideo
Small footprint and configurable video cores (Deprecated)
☆70Updated 3 years ago
Alternatives and similar repositories for litevideo
Users that are interested in litevideo are comparing it to the libraries listed below
Sorting:
- Miscellaneous ULX3S examples (advanced)☆77Updated 2 months ago
- Documenting Lattice's 28nm FPGA parts☆142Updated last year
- UPDuino v2.0 - PCB Design Files, Designs, Documentation☆74Updated 5 years ago
- FPGA USB stack written in LiteX☆127Updated 2 years ago
- User-friendly explanation of Yosys options☆113Updated 3 years ago
- Board and connector definition files for nMigen☆30Updated 4 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆86Updated 6 years ago
- Small footprint and configurable SPI core☆41Updated 3 weeks ago
- 妖刀夢渡☆59Updated 6 years ago
- Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe☆97Updated 2 years ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆62Updated this week
- Change part number or package in a Xilinx 7-series FPGA bitstream☆38Updated 5 years ago
- Low-cost ECP5 FPGA development board☆77Updated 4 years ago
- Example code for the Numato Opsis board, the first HDMI2USB production board.☆49Updated 7 years ago
- Design to connect Lattice Ultraplus FPGA to LH154Q01 Display☆28Updated 6 years ago
- A simple GPU on a TinyFPGA BX☆81Updated 6 years ago
- ☆22Updated 3 years ago
- My pergola FPGA projects☆30Updated 3 years ago
- This repository contains small example designs that can be used with the open source icestorm flow.☆147Updated 3 years ago
- Nitro USB FPGA core☆84Updated last year
- ☆59Updated last year
- Example litex Risc-V SOC and some example code projects in multiple languages.☆67Updated 2 years ago
- DVI video out example for prjtrellis☆16Updated 6 years ago
- understanding the tinyfpga bootloader☆24Updated 7 years ago
- Small Processing Unit 32: A compact RV32I CPU written in Verilog☆69Updated 2 years ago
- Using the TinyFPGA BX USB code in user designs☆49Updated 6 years ago
- A simple script to build open-source FPGA tools.☆52Updated 2 years ago
- Experiments with Yosys cxxrtl backend☆48Updated 4 months ago
- An experiment for building gateware for the axiom micro / beta using amaranth-hdl☆40Updated last week
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆80Updated 4 years ago