数字IC设计 学习笔记
☆168Jan 26, 2022Updated 4 years ago
Alternatives and similar repositories for digital_IC_design_notes
Users that are interested in digital_IC_design_notes are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- 我的数字IC厂库：Verilog HDL; System Vreilog; UVM; ModelSim; Quartus II;☆115Dec 15, 2021Updated 4 years ago
- 数字IC秋招项目、手撕代码☆43Apr 22, 2024Updated 2 years ago
- 关于数字IC的笔试面试题☆15Nov 17, 2019Updated 6 years ago
- IC设计中的一些经典书籍☆13Jul 28, 2020Updated 5 years ago
- 数字IC相关资料☆1,451Jul 1, 2025Updated 10 months ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- 数字IC设计笔试相关的一些电路代码☆16Sep 22, 2023Updated 2 years ago
- A collection of possible interview questions for ASIC PD position☆26Nov 12, 2020Updated 5 years ago
- A collection of great digital IC project/tutorial/website etc..☆154May 10, 2022Updated 4 years ago
- Some design examples of Verilog about digital circuits☆30Nov 21, 2020Updated 5 years ago
- Integrated Circuit Design Laboratory(IC Lab) at 2019 Fall, NCTU. Final project is a customized 16 bits ISA processor.☆24Sep 21, 2021Updated 4 years ago
- Integrated Circuit Design Contest (ICDC) - 大學院校積體電路設計競賽☆25Apr 20, 2022Updated 4 years ago
- AXI Interconnect☆56Aug 20, 2021Updated 4 years ago
- ☆19Aug 11, 2022Updated 3 years ago
- Digital IC design and vlsi notes☆14Jun 24, 2020Updated 5 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- 帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目☆5,442May 15, 2022Updated 4 years ago
- A lock in amplifier running on the RedPitaya's FPGA☆18Jan 29, 2019Updated 7 years ago
- Use Verilog to complete the design of various digital circuits, including common interfaces, such as UART, Bluetooth, IIC, AMBA, etc. It …☆31Nov 21, 2020Updated 5 years ago
- JPEG Compression using DCT (Discrete Cosine Transform) and DWT (Discrete Wavelet Transform) in Matlab.☆10Nov 26, 2019Updated 6 years ago
- HDL & FPGA 学习和规范。CC-BY-NC-SA 4.0。☆16Jun 9, 2023Updated 2 years ago
- ARM中通过APB总线连接的UART模块☆71Feb 21, 2020Updated 6 years ago
- Must-have verilog systemverilog modules☆1,959Mar 12, 2026Updated 2 months ago
- NCTU 2018 Spring Integrated Circuit Design Laboratory☆25Jun 25, 2018Updated 7 years ago
- ITMO SystemC & Verilog assignments - AMBA AHB and SPI☆22Jan 14, 2018Updated 8 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Generic AXI to APB bridge☆13Jul 17, 2014Updated 11 years ago
- Base on Synopsys platform using VCS,DC,ICC,PT.☆11May 29, 2021Updated 4 years ago
- A Fractional Divider with Delta-Sigma Modulator and Dual-Mode Divider for Phase-Locked Loop☆16Apr 25, 2021Updated 5 years ago
- Automatically exported from code.google.com/p/bicubic-interpolation-image-processing☆10Jan 27, 2016Updated 10 years ago
- 数字IC验证案例（SV and UVM）☆30Apr 27, 2021Updated 5 years ago
- wifi☆12Jun 13, 2017Updated 8 years ago
- AMBA bus lecture material☆533Jan 21, 2020Updated 6 years ago
- HeliosXCore is a Superscalar Out-of-order RISC-V Processor Core.☆10Mar 8, 2024Updated 2 years ago
- 《UVM实战》书本源代码和UVM 1.1d源码及Doc☆43Mar 7, 2021Updated 5 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- BlockCIrculantRNN (LSTM and GRU) using TensorFlow☆14Oct 30, 2018Updated 7 years ago
- MCU Space Initialization☆28Nov 14, 2015Updated 10 years ago
- Workflow for Executing CNN Networks on Zynq Ultrascale+ with VITIS AI. Detailed analysis, configuration, and execution of Convolutional N…☆21Apr 8, 2024Updated 2 years ago
- COMS 超大规模集成电路设计书籍☆32May 12, 2022Updated 4 years ago
- ☆25Feb 26, 2024Updated 2 years ago
- In this repository, the RTL design and verification of the axi2apb bridge communication protocol are realized. In this system, the prefer…☆21Apr 11, 2022Updated 4 years ago
- ASIC Verification at 2022 Spring. This course only use SystemVerilog, did not use UVM.☆20Feb 14, 2023Updated 3 years ago