dumpo / my_verilog_projects

Related projects: ⓘ

• lucky-wfw / ARM_AMBA_Design
  Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.
  ☆108Updated 3 years ago
• courageheart / AMBA_APB_SRAM
  AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM an…
  ☆147Updated 6 years ago
• wangjidwb123 / AHB-SRAMC
  IC Verification & SV Demo
  ☆42Updated 2 years ago
• marcoz001 / axi-uvm
  yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/
  ☆102Updated 6 years ago
• huangxc6 / E203_CNN_Genesys2
  Final Project of Software_Hardware_Co-Design_24Spring. FPGA-based RISC-V+ Convolutional Acceleration Unit.
  ☆10Updated 4 months ago
• gupta409 / Processor-UVM-Verification
  System Verilog based Verification of MIPS 5 staged pipelined processor using UVM environment
  ☆90Updated 6 years ago
• freecores / dma_axi
  AXI DMA 32 / 64 bits
  ☆95Updated 10 years ago
• gillianGan / ahb_sram_master
  ☆18Updated 4 years ago
• Daniel-GGB / My-Digital-IC-Library
  我的数字IC厂库：Verilog HDL; System Vreilog; UVM; ModelSim; Quartus II;
  ☆62Updated 2 years ago
• Practical-UVM-Step-By-Step / Practical-UVM-Step-By-Step
  This is the main repository for all the examples for the book Practical UVM
  ☆165Updated 3 years ago
• kumarrishav14 / AXI
  VIP for AXI Protocol
  ☆100Updated 2 years ago
• mayurkubavat / UVM-Examples
  UVM examples and projects
  ☆119Updated 5 years ago
• adki / gen_amba_2021
  AMBA bus generator including AXI4, AXI3, AHB, and APB
  ☆168Updated last year
• twomonkeyclub / UART
  ARM中通过APB总线连接的UART模块
  ☆57Updated 4 years ago
• seabeam / yuu_ahb
  UVM AHB VIP
  ☆75Updated 2 years ago
• Verdvana / AXI4_Interconnect
  AXI总线连接器
  ☆89Updated 4 years ago
• adki / AMBA_AXI_AHB_APB
  AMBA bus lecture material
  ☆365Updated 4 years ago
• Travissss / ahb2apb-bridge
  An uvm verification env for ahb2apb bridge
  ☆45Updated 3 years ago
• funningboy / uvm_axi
  uvm AXI BFM(bus functional model)
  ☆227Updated 11 years ago
• troyguo / awesome-dv
  Awesome ASIC design verification
  ☆244Updated 2 years ago
• prajwalgekkouga / AHB-to-APB-Bridge
  The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB…
  ☆47Updated last year
• dumpo / digital_IC_design_notes
  数字IC设计 学习笔记
  ☆110Updated 2 years ago
• thedatabusdotio / fpga-ml-accelerator
  This repository hosts the code for an FPGA based accelerator for convolutional neural networks
  ☆114Updated 2 months ago
• MushroomZQ / RISC_VERIF_DEMO_0
  a very simple risc_cpu verification demo with uvm
  ☆21Updated 5 years ago
• nelsoncsc / ISP_UVM
  A Framework for Design and Verification of Image Processing Applications using UVM
  ☆87Updated 6 years ago
• flyskywalker / ahb_sramc
  ahb scram controller, design and verification
  ☆25Updated 6 years ago
• 9334swjtu / PYNQ_softmax
  achieve softmax in PYNQ with heterogeneous computing.
  ☆61Updated 5 years ago
• Advanced-Microelectronics-Group / OpenC910_Modified
  commit rtl and build cosim env
  ☆35Updated 5 months ago
• andres-mancera / ethernet_10ge_mac_SV_UVM_tb
  SystemVerilog-based UVM testbench for an Ethernet 10GE MAC core
  ☆126Updated 6 years ago
• Siddhi-95 / AHB-to-APB-Bridge-Verification
  Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.
  ☆62Updated last year