programer-guan / digital_ic_verificationLinks
数字IC验证案例（SV and UVM）
☆26Updated 4 years ago
Alternatives and similar repositories for digital_ic_verification
Users that are interested in digital_ic_verification are comparing it to the libraries listed below
Sorting:
- ☆16Updated 3 years ago
- An uvm verification env for ahb2apb bridge☆56Updated 4 years ago
- AHB to APB Bridge VIP☆30Updated 6 years ago
- ☆20Updated 3 years ago
- UART design in SV and verification using UVM and SV☆50Updated 6 years ago
- 2018第二届全国大学生FPGA创新设计邀请赛的作品☆63Updated 6 years ago
- SPI interface connect to APB BUS with Verilog HDL☆38Updated 4 years ago
- Attempt to setup a bridge between AHB and I2C by constructing dedicated modules of AHB master , AHB slave , APB master , APB slave, I2C m…☆22Updated 6 years ago
- IC Verification & SV Demo☆54Updated 4 years ago
- This is the UVM environment for UART-APB IP core. This environment contains full UVM components. It is only used for studing and invetiga…☆24Updated 6 years ago
- AXI Interconnect☆54Updated 4 years ago
- DDR3 function verification environment in UVM☆25Updated 7 years ago
- Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.☆133Updated 4 years ago
- A Framework for Design and Verification of Image Processing Applications using UVM☆112Updated 8 years ago
- ARM中通过APB总线连接的UART模块☆69Updated 5 years ago
- a very simple risc_cpu verification demo with uvm☆26Updated 6 years ago
- AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc☆41Updated 3 years ago
- PCIE 5.0 Graduation project (Verification Team)☆88Updated last year
- ☆38Updated 10 years ago
- Verification IP for APB protocol☆72Updated 4 years ago
- UVM resource from github, run simulation use YASAsim flow☆31Updated 5 years ago
- 支持AXI总线协议的8k×8 SP SRAM☆26Updated 5 years ago
- FFT implement by verilog_测试验证已通过☆58Updated 9 years ago
- 我的数字IC厂库：Verilog HDL; System Vreilog; UVM; ModelSim; Quartus II;☆105Updated 3 years ago
- 学习AXI接口，以及xilinx DDR3 IP使用☆38Updated 8 years ago
- Mirror of william_william/uvm-mcdf on Gitee☆28Updated 3 years ago
- RiscSoC 是一个芯片集成项目，包含了 Cortex-M0、Cortex-M3、MIPS、RISC-V、4-BIT 等内核的 SoC 集成，部分 SoC 使用的自己设计的内核☆11Updated 3 years ago
- ☆71Updated 9 years ago
- LMS-Adaptive Filter implement using verilog and Matlab☆46Updated 9 years ago
- work in SSRL, SOC/NOC/Chiplet Design, DDR/UCIe/PCIe, UVM Framework☆36Updated 3 years ago