我的数字IC厂库：Verilog HDL; System Vreilog; UVM; ModelSim; Quartus II;
☆120Dec 15, 2021Updated 4 years ago
Alternatives and similar repositories for My-Digital-IC-Library
Users that are interested in My-Digital-IC-Library are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- 数字IC设计 学习笔记☆171Jan 26, 2022Updated 4 years ago
- 关于数字IC的笔试面试题☆15Nov 17, 2019Updated 6 years ago
- IC设计中的一些经典书籍☆13Jul 28, 2020Updated 5 years ago
- 数字IC秋招项目、手撕代码☆43Apr 22, 2024Updated 2 years ago
- 数字IC相关资料☆1,484Jul 1, 2025Updated 11 months ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Some design examples of Verilog about digital circuits☆31Nov 21, 2020Updated 5 years ago
- ☆21Jul 3, 2025Updated 11 months ago
- This repository contains an example of the connection between an UVM Testbench and a Python reference model.☆12Nov 6, 2019Updated 6 years ago
- Example files for the book FPGA SIMULATION☆23Apr 6, 2017Updated 9 years ago
- A collection of great digital IC project/tutorial/website etc..☆157May 10, 2022Updated 4 years ago
- AXI总线连接器☆107Mar 26, 2020Updated 6 years ago
- For v1.2 test☆12Sep 5, 2020Updated 5 years ago
- study uvm step by step☆11Mar 28, 2019Updated 7 years ago
- This is the repository for the IEEE version of the book☆82Sep 29, 2020Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Integrated Circuit Design Contest (ICDC) - 大學院校積體電路設計競賽☆25Apr 20, 2022Updated 4 years ago
- UVM components for DSP tasks (MODulation/DEModulation)☆16Mar 2, 2022Updated 4 years ago
- Verification AXI-4 bus standard using UVM and System Verilog☆16Apr 7, 2018Updated 8 years ago
- CORE-V MCU UVM Environment and Test Bench☆26Jul 19, 2024Updated last year
- Generic AXI interconnect fabric☆13Jul 17, 2014Updated 11 years ago
- DDR3 function verification environment in UVM☆27Apr 1, 2018Updated 8 years ago
- AXI Interconnect☆57Aug 20, 2021Updated 4 years ago
- ☆17Feb 9, 2023Updated 3 years ago
- UVM verification platform for DW_apb_i2c IP core(Master Mode)☆13Aug 21, 2023Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Sample UVM code for axi ram dut☆39Dec 14, 2021Updated 4 years ago
- UVM resource from github, run simulation use YASAsim flow☆33Apr 25, 2020Updated 6 years ago
- Digital system design: Training lessons and exercise projects for students☆11May 12, 2023Updated 3 years ago
- An example OMI Device FPGA with 2 DDR4 memory ports☆20Jan 5, 2023Updated 3 years ago
- wifi☆12Jun 13, 2017Updated 9 years ago
- A Framework for Design and Verification of Image Processing Applications using UVM☆120Nov 27, 2017Updated 8 years ago
- 清華大學 | 積體電路設計實驗 (IC LAB) | 110上☆50Oct 14, 2022Updated 3 years ago
- 学习AXI接口，以及xilinx DDR3 IP使用☆40Mar 6, 2017Updated 9 years ago
- CNN accelerator implemented with Spinal HDL☆160Jan 29, 2024Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- 分享FPGA开发知识、优秀文章、学习网站以及开源项目。本项目收集了github中许多FPGA开源项目。☆810Apr 21, 2023Updated 3 years ago
- UVM verification kits which uses YASA as simulation script☆18Dec 10, 2019Updated 6 years ago
- BlockCIrculantRNN (LSTM and GRU) using TensorFlow☆14Oct 30, 2018Updated 7 years ago
- Must-have verilog systemverilog modules☆39May 1, 2022Updated 4 years ago
- Design of BandGapReference Circuit using Sky130 PDK☆11Oct 30, 2021Updated 4 years ago
- Xilinx AR65444 - Xilinx PCIe DMA Driver for linux☆22May 10, 2019Updated 7 years ago
- ☆82Jan 19, 2016Updated 10 years ago