lucky-wfw / IC_System_DesignLinks
Use Verilog to complete the design of various digital circuits, including common interfaces, such as UART, Bluetooth, IIC, AMBA, etc. It also includes various common circuits, such as FIFO, RAM, state machine, and so on. All designs have been validated by Testbench and FPGA functions.
☆29Updated 4 years ago
Alternatives and similar repositories for IC_System_Design
Users that are interested in IC_System_Design are comparing it to the libraries listed below
Sorting:
- ARM中通过APB总线连接的UART模块☆67Updated 5 years ago
- A 32-point pipelined Fast Fourier transform processor, using single path delay architecture, and based on radix2-DIF(decimation-in-freque…☆49Updated 6 years ago
- AXI DMA 32 / 64 bits☆121Updated 11 years ago
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆66Updated last year
- Step by step tutorial for building CortexM0 SoC☆38Updated 3 years ago
- AHB DMA 32 / 64 bits☆56Updated 11 years ago
- AXI总线连接器☆103Updated 5 years ago
- SPI interface connect to APB BUS with Verilog HDL☆36Updated 4 years ago
- FFT implement by verilog_测试验证已通过☆58Updated 8 years ago
- A Framework for Design and Verification of Image Processing Applications using UVM☆105Updated 7 years ago
- This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…☆58Updated 3 years ago
- RTL Verilog library for various DSP modules☆89Updated 3 years ago
- Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.☆130Updated 4 years ago
- ☆68Updated 9 years ago
- SDRAM controller with AXI4 interface☆96Updated 6 years ago
- The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB…☆64Updated 2 years ago
- Interface Protocol in Verilog☆50Updated 6 years ago
- 基于FPGA的三速以太网UDP协议栈设计☆29Updated last year
- 基于FPGA的图像处理模块(出自于crazybingo)(将部分IP换为纯Verilog用于跨平台移植)☆48Updated 5 years ago
- ☆36Updated 10 years ago
- APB to I2C☆44Updated 11 years ago
- AXI4 and AXI4-Lite interface definitions☆94Updated 4 years ago
- Cortex M0 based SoC☆74Updated 3 years ago
- image processing based FPGA☆113Updated 3 years ago
- IC Verification & SV Demo☆54Updated 3 years ago
- Final Project for my course in Advanced Verification with SystemVerilog OOP☆21Updated 3 years ago
- 3×3脉动阵列乘法器☆46Updated 5 years ago
- Bitmap Processing Library & AXI-Stream Video Image VIP☆33Updated 3 years ago
- AXI Interconnect☆52Updated 4 years ago
- AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc☆41Updated 3 years ago