Alternatives and similar repositories for Learning-materials

Users that are interested in Learning-materials are comparing it to the libraries listed below

• programer-guan / digital_ic_verification
  数字IC验证案例（SV and UVM）
  ☆26Updated 4 years ago
• dumpo / digital_IC_design_notes
  数字IC设计 学习笔记
  ☆151Updated 3 years ago
• Daniel-GGB / My-Digital-IC-Library
  我的数字IC厂库：Verilog HDL; System Vreilog; UVM; ModelSim; Quartus II;
  ☆93Updated 3 years ago
• feifan1996 / RiscSoC
  RiscSoC 是一个芯片集成项目，包含了 Cortex-M0、Cortex-M3、MIPS、RISC-V、4-BIT 等内核的 SoC 集成，部分 SoC 使用的自己设计的内核
  ☆11Updated 3 years ago
• Starrynightzyq / Nexys4DDR-ARM-M3-Plate-Recognition
  车牌识别,FPGA,2019全国大学生集成电路创新创业大赛
  ☆142Updated 5 years ago
• MasterPu2020 / IC-design-general
  数字IC设计笔试相关的一些电路代码
  ☆12Updated last year
• wbbbbbb123 / Sram-controller-design-based-on-AHB-bus
  ☆20Updated 2 years ago
• Starrynightzyq / ZYNQ-PYNQ-Z2-Gobang
  2018第二届全国大学生FPGA创新设计邀请赛的作品
  ☆60Updated 6 years ago
• CustomizableComputingLab / CustomizableComputingLab.github.io
  ☆148Updated 3 weeks ago
• wbbbbbb123 / UVM-based-AHB-bus-SRAM-controller-design-verification-platform-design
  ☆15Updated 3 years ago
• designsolver / ahb2apb_bridge_vip
  AHB to APB Bridge VIP
  ☆29Updated 6 years ago
• Frogwells / fpga_design
  这是我所开发的两个项目，包括ov5640-ddr3-usb2.0高速图像采集系统以及NOIP1SN1300A-ddr3-sdhc高速地表图像采集及存储系统
  ☆93Updated 7 years ago
• Travissss / ahb2apb-bridge
  An uvm verification env for ahb2apb bridge
  ☆54Updated 4 years ago
• lizhirui / AXI_spec_chinese
  AXI协议规范中文翻译版
  ☆159Updated 3 years ago
• WeitaoZhu / CMOS_VLSI_Design
  COMS 超大规模集成电路设计书籍
  ☆27Updated 3 years ago
• twomonkeyclub / UART
  ARM中通过APB总线连接的UART模块
  ☆66Updated 5 years ago
• luyixdu / ZYNQ_ov5640_hdmi_frame_difference
  帧差法运动目标检测，基于ZYNQ7020
  ☆70Updated 4 years ago
• suisuisi / FPGAandStudy
  帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目
  ☆34Updated 3 years ago
• YTYICer / AHB_SRAM
  This project is AHB_SRAM design based on 启芯学堂,which contains all the source files.
  ☆14Updated 3 years ago
• dumpo / my_verilog_projects
  数字IC秋招项目、手撕代码
  ☆36Updated last year
• liuqdev / 8-bits-RISC-CPU-Verilog
  Architecture and Verilog Implementation of 8-bits RISC CPU based on FSM. 基于有限状态机的8位RISC（精简指令集）CPU（中央处理器）简单结构和Verilog实现。
  ☆148Updated 6 years ago
• siyueyinghua / UVMInPracticesByZhangQiang
  《UVM实战》书本源代码和UVM 1.1d源码及Doc
  ☆41Updated 4 years ago
• ForrestBlue / cortexm0ds
  ☆68Updated 9 years ago
• kdurant / axi-ddr3
  学习AXI接口，以及xilinx DDR3 IP使用
  ☆37Updated 8 years ago
• suisuisi / FPGA
  FPGA
  ☆126Updated 5 years ago
• xiaoerlang0359 / E203plus
  upgrade to e203 (a risc-v core)
  ☆44Updated 5 years ago
• wangjidwb123 / AHB-SRAMC
  IC Verification & SV Demo
  ☆54Updated 3 years ago
• DexWen / LMS-Adaptive-filter
  LMS-Adaptive Filter implement using verilog and Matlab
  ☆44Updated 8 years ago
• emwzq / example_uvm
  UVM实战随书源码
  ☆53Updated 6 years ago
• howard789 / uvm_example
  This is a uvm example. The video is available at https://www.bilibili.com/video/BV1yq4y177f6/
  ☆47Updated 3 years ago