Adding PR to the PYNQ Overlay
☆19Apr 19, 2017Updated 8 years ago
Alternatives and similar repositories for PYNQ_PR_Overlay
Users that are interested in PYNQ_PR_Overlay are comparing it to the libraries listed below
Sorting:
- Networking Overlay on PYNQ☆50Mar 5, 2019Updated 6 years ago
- Light Cube using PYNQ☆10Aug 4, 2018Updated 7 years ago
- IP-core package generator for AXI4/Avalon☆22Nov 25, 2018Updated 7 years ago
- ☆10Mar 20, 2021Updated 4 years ago
- Implementation of FM (frequency modulation) radio transmitter in FPGA Altera Cyclone III.☆14May 16, 2016Updated 9 years ago
- ☆26Jul 6, 2018Updated 7 years ago
- NPUEval is an LLM evaluation dataset written specifically to target AIE kernel code generation on RyzenAI hardware.☆29Nov 8, 2025Updated 3 months ago
- Atom Hardware IDE☆13May 4, 2021Updated 4 years ago
- HDMI Expansion Modules compatible with the Pmod standard☆11Apr 5, 2018Updated 7 years ago
- WaRP7 User Guide Source. For binary releases go to the release tab☆12Apr 8, 2018Updated 7 years ago
- ☆28Feb 21, 2018Updated 8 years ago
- Xilinx Contest Kshitij 2019☆19May 31, 2023Updated 2 years ago
- ☆14Mar 13, 2023Updated 2 years ago
- The Demo that was presented at FCCM.☆16Aug 16, 2018Updated 7 years ago
- Implementation of hardware cores—including encryption, PRNGs, DSP modules, and accelerators—developed in pure Verilog for reference. Each…☆47Dec 29, 2025Updated 2 months ago
- Skeletal repository for GNU Radio WBFM implementation on Pynq board☆13Jun 15, 2017Updated 8 years ago
- pynq framework for antsdr☆37May 31, 2024Updated last year
- This repository contains a set of examples of opencl code that can run on the zedboard zynq all programmable soc.☆16Jan 13, 2016Updated 10 years ago
- Pynq projects and guides☆29Sep 11, 2018Updated 7 years ago
- Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ☆34Sep 19, 2018Updated 7 years ago
- Xilinx Deep Learning IP☆94May 10, 2021Updated 4 years ago
- This is a myhdl test environment for the open-cores jpeg_encoder.☆18Oct 23, 2016Updated 9 years ago
- Xilinx Virtual Cable Daemon☆20Nov 20, 2019Updated 6 years ago
- Scripts to automate the process of building an image for the Xilinx PYNQ project. This repository is deprecated as its functionality is n…☆20Feb 21, 2017Updated 9 years ago
- PS4 stereo camera driver using the V4L2 API.☆17Feb 18, 2016Updated 10 years ago
- A multi-board Extended Kalman Filter (EKF)☆32Sep 23, 2018Updated 7 years ago
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆37Jul 10, 2019Updated 6 years ago
- Xilinx 7-series FTDI-FPGA interface through JTAG with 125 us roundtrip latency☆20May 30, 2019Updated 6 years ago
- ☆15Apr 11, 2025Updated 10 months ago
- IIoT-SPYN gives users the ability to control, monitor, capture data, visualize and analyze industrial grade motors☆44Mar 19, 2020Updated 5 years ago
- Design contest for DAC 2018☆17Apr 12, 2018Updated 7 years ago
- AXI MIPI CSI2 RX FPGA core and kernel driver☆19Jul 4, 2015Updated 10 years ago
- Hardware-accelerated sorting algorithm☆16May 4, 2020Updated 5 years ago
- ☆250Oct 13, 2020Updated 5 years ago
- Connecting FPGA and MCU using Ethernet RMII☆23Jan 23, 2016Updated 10 years ago
- Cross compile FPGA tools☆21Jan 4, 2021Updated 5 years ago
- RMII Firewall FPGA☆25Dec 2, 2019Updated 6 years ago
- A Grako-based parser for IEEE 1149.1 Boundary-Scan Description Language (BSDL) files☆27Sep 2, 2025Updated 6 months ago
- implementing a Recurrent Neural Network with binarized weight format on FPGA☆22Sep 3, 2017Updated 8 years ago