UNSAMDCI / PDK_ONC5
Educational Design Kit for Synopsys Tools with a set of Characterized Standard Cell Library
☆33Updated 3 years ago
Alternatives and similar repositories for PDK_ONC5:
Users that are interested in PDK_ONC5 are comparing it to the libraries listed below
- ☆40Updated 3 years ago
- Open Source tool to build liberty files and for Characterizing Standard Cells.☆25Updated 4 years ago
- EE 260 Winter 2017: Advanced VLSI Design☆62Updated 8 years ago
- Python Tool for UVM Testbench Generation☆52Updated 10 months ago
- ☆42Updated 11 months ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆66Updated 3 years ago
- fakeram generator for use by researchers who do not have access to commercial ram generators☆35Updated 2 years ago
- ☆20Updated 3 years ago
- AMC: Asynchronous Memory Compiler☆48Updated 4 years ago
- This repository has a list of collaterals needed for ICC2 workshop. It has a modified version of raven_soc which was taped-out by Efables…☆30Updated 4 years ago
- Open source process design kit for 28nm open process☆51Updated 11 months ago
- Introductory course into static timing analysis (STA).☆88Updated 4 months ago
- General Purpose AXI Direct Memory Access☆49Updated 10 months ago
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆44Updated 4 years ago
- This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK☆38Updated 3 years ago
- This is a tutorial on standard digital design flow☆75Updated 3 years ago
- SKY130 SRAM macros generated by SRAM 22☆15Updated last month
- reference block design for the ASAP7nm library in Cadence Innovus☆39Updated 9 months ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆65Updated 4 years ago
- ideas and eda software for vlsi design☆49Updated last week
- This script builds openlane and all its dependencies on an Ubuntu (only) System.☆21Updated 2 years ago
- This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…☆44Updated 3 years ago
- SystemVerilog Direct Programming Interface (DPI) Tutorial☆53Updated 4 years ago
- SystemVerilog modules and classes commonly used for verification☆46Updated 2 months ago
- SystemVerilog RTL Linter for YoSys☆20Updated 4 months ago
- Asynchronous fifo in verilog☆33Updated 9 years ago
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆55Updated 2 years ago
- This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk☆30Updated 3 years ago
- This is the repository for the IEEE version of the book☆57Updated 4 years ago
- ☆41Updated 5 years ago