Educational Design Kit for Synopsys Tools with a set of Characterized Standard Cell Library
☆36Jan 18, 2022Updated 4 years ago
Alternatives and similar repositories for PDK_ONC5
Users that are interested in PDK_ONC5 are comparing it to the libraries listed below
Sorting:
- ☆51Apr 8, 2024Updated last year
- An open source PDK using TIGFET 10nm devices.☆56Dec 19, 2022Updated 3 years ago
- A library of verilog and vhdl modules☆15Nov 13, 2018Updated 7 years ago
- Fork from https://sourceforge.net/projects/gds3d☆68Jun 11, 2024Updated last year
- SMT-based-STDCELL-Layout-Generator☆18Sep 30, 2021Updated 4 years ago
- SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0☆19Jul 22, 2020Updated 5 years ago
- A verilog parser☆19Apr 12, 2024Updated last year
- DATC RDF☆49Jul 31, 2020Updated 5 years ago
- Synopsys Design compiler, VCS and Tetra-MAX☆19May 29, 2018Updated 7 years ago
- Jupyter kernel for Cadence SKILL☆22Feb 16, 2017Updated 9 years ago
- Useful utilities for BAR projects☆32Jan 3, 2024Updated 2 years ago
- ☆26Apr 24, 2021Updated 4 years ago
- Gate-level visualization generator for SKY130-based chip designs.☆20Jul 22, 2021Updated 4 years ago
- ☆191Aug 30, 2021Updated 4 years ago
- Copyleftist's Standard Cell Library☆101May 2, 2024Updated last year
- Open Source tool to build liberty files and for Characterizing Standard Cells.☆28Feb 18, 2021Updated 5 years ago
- Delay Calculation ToolKit☆32Aug 7, 2022Updated 3 years ago
- 32 bit RISC-V CPU implementation in Verilog☆34Feb 9, 2022Updated 4 years ago
- ☆114Feb 2, 2021Updated 5 years ago
- SDK Firmware infrastructure, contain RTOS Abstraction Layer, demos, SweRV Processor Support Package, and more ...☆30Dec 9, 2021Updated 4 years ago
- ☆40Mar 2, 2023Updated 3 years ago
- ☆10Nov 13, 2025Updated 3 months ago
- fakeram generator for use by researchers who do not have access to commercial ram generators☆38Jan 13, 2023Updated 3 years ago
- Stake LP Tokens and earn RIO☆10Oct 20, 2020Updated 5 years ago
- ซอร์สโค้ดและไฟล์ต่างๆสำหรับหนังสือ "คู่มือเขียนแอพ Android ด้วย Android Studio"☆10Oct 4, 2015Updated 10 years ago
- Collaboration of two technologies (Machine Learning and TCAD) to improve the productivity in Semiconductor manufacturing industry☆10May 3, 2019Updated 6 years ago
- My personal Electronics projects versioning repo.☆13Dec 9, 2013Updated 12 years ago
- ☆11Jun 26, 2020Updated 5 years ago
- ☆12Apr 2, 2025Updated 11 months ago
- The processingjs.org website☆29Jun 5, 2020Updated 5 years ago
- Pipeline used internally for Peter Bubenik's TDA Group at UF.☆11Nov 3, 2022Updated 3 years ago
- Generate SystemVerilog/UVM block level testbench setup with python script☆10Oct 3, 2017Updated 8 years ago
- ☆44Jan 26, 2020Updated 6 years ago
- ☆11Dec 24, 2019Updated 6 years ago
- Number Geometry methods: Shortest Vector Problem and Shorter Basis Problem in Lattice (Hamming distance, Bounded distance decoding, bina…☆13May 19, 2023Updated 2 years ago
- We implement the progressive Improved Progressive BKZ with Lattice Sieving presented in https://eprint.iacr.org/2022/1343, one can call i…☆13Feb 14, 2025Updated last year
- Implementation of the paper Unsupervised Domain Adaptation by Backpropagation☆10Dec 1, 2018Updated 7 years ago
- ☆39Apr 10, 2023Updated 2 years ago
- Ophidian's Mirror Repository on github. https://gitlab.com/eclufsc/eda/ophidian☆45Feb 17, 2021Updated 5 years ago