Alternatives and similar repositories for sa-placer

Users that are interested in sa-placer are comparing it to the libraries listed below

• gatecat / hrt
  Hot Reconfiguration Technology demo
  ☆40Updated 2 years ago
• prjunnamed / prjcombine
  An FPGA reverse engineering and documentation project
  ☆47Updated last week
• amaranth-lang / amaranth-stdio
  Industry standard I/O for Amaranth HDL
  ☆28Updated 8 months ago
• trabucayre / quickfeather-notes
  Notes, scripts and apps to quickfeather board
  ☆10Updated 3 years ago
• charlottia / hdx
  HDL development environment on Nix.
  ☆26Updated 7 months ago
• YoWASP / yosys
  Unofficial Yosys WebAssembly packages
  ☆71Updated this week
• tomverbeure / cxxrtl_eval
  Experiments with Yosys cxxrtl backend
  ☆49Updated 5 months ago
• tomverbeure / sidechan
  Side channel communication test within an FPGA
  ☆11Updated 4 years ago
• Coloquinte / quaigh
  Logic circuit analysis and optimization
  ☆40Updated 8 months ago
• can-lehmann / pathbeaver
  Symbolic execution of LLVM IR
  ☆13Updated last year
• amaranth-lang / rfcs
  RFCs for changes to the Amaranth language and standard components
  ☆18Updated last month
• chipy-hdl / chipy
  chipy hdl
  ☆17Updated 7 years ago
• amaranth-lang / amaranth-yosys
  WebAssembly-based Yosys distribution for Amaranth HDL
  ☆27Updated 3 weeks ago
• greatscottgadgets / bucatini
  a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface
  ☆32Updated 3 years ago
• m-labs / microscope
  Finding the bacteria in rotting FPGA designs.
  ☆14Updated 4 years ago
• sylefeb / Iron
  Iron: selectively turn RISC-V binaries into hardware
  ☆23Updated 2 years ago
• ekiwi / fst-reader
  Native Rust implementation of the FST waveform format from GTKWave.
  ☆13Updated last week
• RTimothyEdwards / irsim
  IRSIM switch-level simulator for digital circuits
  ☆34Updated 2 months ago
• amaranth-lang / rtl-debugger
  VS Code based debugger for hardware designs in Amaranth or Verilog
  ☆39Updated 6 months ago
• mattvenn / vga_clock_pcb
  Open source hardware down to the chip level!
  ☆30Updated 3 years ago
• marcnewlin / rust-nrf24-receiver-experiment
  small experiment to learn some rust via a nRF24 Enhanced Shockburst receiver (2SPS IQ -> packets)
  ☆12Updated 4 years ago
• lachlansneff / ligeia
  A replacement for gtkwave, written in Rust with high-performance and larger-than-memory traces in mind.
  ☆19Updated 2 years ago
• lethalbit / discretize
  A Yosys pass and technology library + scripts for implementing a HDL design in discretie FETs for layout in KiCad
  ☆11Updated last year
• sylefeb / Silixel
  Exploring gate level simulation
  ☆58Updated last month
• hamsternz / lfsr_scramblers
  Experiments with self-synchronizing LFSR scramblers
  ☆15Updated 4 years ago
• mmicko / cross-fpga
  Cross compile FPGA tools
  ☆22Updated 4 years ago
• robtaylor / amaranth-awesome
  Awesome projects using the Amaranth HDL
  ☆15Updated 4 months ago
• YosysHQ / prjtrellis-db
  Project Trellis database
  ☆13Updated last year
• sparrowgrine / prjtritium
  ☆22Updated 3 years ago
• Kuree / fsim
  Fiber-based SystemVerilog Simulator.
  ☆25Updated 2 years ago