Alternatives and similar repositories for riscv-linux

Users that are interested in riscv-linux are comparing it to the libraries listed below

• stnolting / neorv32-riscof
  ✔️ Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
  ☆34Updated last week
• five-embeddev / riscv-scratchpad
  RISC-V Scratchpad
  ☆70Updated 2 years ago
• riscv-non-isa / riscv-external-debug-security
  The RISC-V External Debug Security Specification
  ☆20Updated this week
• riscv-non-isa / riscv-c-api-doc
  Documentation of the RISC-V C API
  ☆77Updated last week
• riscv-non-isa / riscv-uefi
  ☆33Updated 3 years ago
• riscv-non-isa / riscv-trace-spec
  RISC-V Processor Trace Specification
  ☆195Updated last month
• riscv-non-isa / riscv-semihosting
  ☆32Updated this week
• racerxdl / riscv-online-asm
  RISC-V Online Assembler using Emscripten, Gnu Binutils
  ☆58Updated 2 years ago
• lowRISC / muntjac
  64-bit multicore Linux-capable RISC-V processor
  ☆97Updated 6 months ago
• brucehoult / rvv_example
  Simple demonstration of using the RISC-V Vector extension
  ☆48Updated last year
• riscv-non-isa / riscv-device-tree-doc
  RISC-V Specific Device Tree Documentation
  ☆42Updated last year
• ultraembedded / riscv-linux-boot
  Trivial RISC-V Linux binary bootloader
  ☆51Updated 4 years ago
• riscv / riscv-test-env
  ☆50Updated last month
• riscvarchive / riscv-code-size-reduction
  ☆147Updated last year
• openhwgroup / cv32e40x-dv
  CV32E40X Design-Verification environment
  ☆14Updated last year
• riscvarchive / riscv-platform-specs
  RISC-V Profiles and Platform Specification
  ☆114Updated 2 years ago
• riscv-admin / riscv-ovpsim
  ☆61Updated 4 years ago
• YosysHQ / nerv
  Naive Educational RISC V processor
  ☆91Updated 3 weeks ago
• tomverbeure / gdbwave
  GDB server to debug CPU simulation waveform traces
  ☆43Updated 3 years ago
• ultraembedded / exactstep
  Instruction set simulator for RISC-V, MIPS and ARM-v6m
  ☆102Updated 4 years ago
• sifiveinc / meta-sifive
  SiFive OpenEmbedded / Yocto BSP Layer
  ☆54Updated last month
• openhwgroup / cv32e40s
  4 stage, in-order, secure RISC-V core based on the CV32E40P
  ☆150Updated last year
• riscv / configuration-structure
  RISC-V Configuration Structure
  ☆41Updated last year
• merledu / nucleusrv
  NucleusRV (rv32-imf) - A 32-bit 5 staged pipelined risc-v core.
  ☆75Updated last month
• michaeljclark / riscv-disassembler
  RISC-V Disassembler with support for RV32/RV64/RV128 IMAFDC
  ☆101Updated 3 years ago
• riscv-non-isa / riscv-toolchain-conventions
  Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains
  ☆150Updated last week
• michaeljclark / busybear-linux
  busybear-linux is a tiny RISC-V Linux root filesystem image that targets the VirtIO board in riscv-qemu.
  ☆98Updated last year
• michaeljclark / riscv-probe
  Simple machine mode program to probe RISC-V control and status registers
  ☆126Updated 2 years ago
• bluespec / RISCV_gdbstub
  A gdbstub for connecting GDB to a RISC-V Debug Module
  ☆30Updated last year
• riscv / riscv-aia
  ☆96Updated 2 months ago