antonblanchard / microwatt
A tiny Open POWER ISA softcore written in VHDL 2008
☆677Updated last month
Alternatives and similar repositories for microwatt:
Users that are interested in microwatt are comparing it to the libraries listed below
- ☆246Updated 2 years ago
- VRoom! RISC-V CPU☆499Updated 6 months ago
- Documenting the Xilinx 7-series bit-stream format.☆791Updated last week
- Package manager and build abstraction tool for FPGA/ASIC development☆1,255Updated last week
- Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators☆647Updated 4 months ago
- VeeR EH1 core☆864Updated last year
- VHDL synthesis (based on ghdl)☆329Updated last month
- SERV - The SErial RISC-V CPU☆1,516Updated last week
- Linux on LiteX-VexRiscv☆622Updated this week
- A small, light weight, RISC CPU soft core☆1,371Updated last month
- A directory of Western Digital’s RISC-V SweRV Cores☆863Updated 5 years ago
- A Linux-capable RISC-V multicore for and by the world☆669Updated 3 weeks ago
- mor1kx - an OpenRISC 1000 processor IP core☆525Updated this week
- RSD: RISC-V Out-of-Order Superscalar Processor☆1,061Updated 3 weeks ago
- Documenting the Lattice ECP5 bit-stream format.☆410Updated 2 months ago
- nextpnr portable FPGA place and route tool☆1,411Updated this week
- A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen☆668Updated 3 years ago
- RISC-V Formal Verification Framework☆598Updated 2 years ago
- The OpenPiton Platform☆677Updated 3 weeks ago
- ☆551Updated this week
- A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …☆637Updated last week
- Small footprint and configurable DRAM core☆401Updated 2 months ago
- Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.☆1,500Updated last month
- A Python toolbox for building complex digital hardware☆1,263Updated last month
- Working Draft of the RISC-V Debug Specification Standard☆479Updated last month
- The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux☆2,414Updated this week
- A simple RISC-V processor for use in FPGA designs.☆269Updated 7 months ago
- Small footprint and configurable PCIe core☆529Updated 2 weeks ago
- Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)☆1,045Updated last month
- RISC-V simulator for x86-64☆701Updated 3 years ago