alfikpl / ao486Links
The ao486 is an x86 compatible Verilog core implementing all features of a 486 SX.
☆399Updated 11 years ago
Alternatives and similar repositories for ao486
Users that are interested in ao486 are comparing it to the libraries listed below
Sorting:
- 80186 compatible SystemVerilog CPU core and FPGA reference design☆408Updated last year
- Open source implementation of a x86 processor☆332Updated 7 years ago
- IBM PC Compatible SoC for a commercially available FPGA board☆73Updated 9 years ago
- A Verilog HDL model of the MOS 6502 CPU☆364Updated 2 years ago
- Oldland CPU - a 32-bit RISC FPGA CPU including RTL + tools☆126Updated 9 years ago
- The aoR3000 is a MIPS R3000A compatible core capable of booting the Linux kernel version 3.16 in about 3 seconds and with a rating of 48.…☆45Updated 11 years ago
- A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz☆415Updated last week
- An attempt at a small Verilog implementation of the original Apple 1 on an FPGA☆149Updated 3 months ago
- FPGA-based Nintendo Entertainment System Emulator☆269Updated 2 years ago
- Reverse engineering the XC2064 FPGA☆83Updated 4 years ago
- A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals☆248Updated 7 years ago
- TPU, The Test Processing Unit. Or Terrible Processing Unit. A simple 16-bit CPU in VHDL for education as to the dataflow within a CPU. De…☆150Updated 9 years ago
- NES in Verilog☆201Updated 5 months ago
- GPL v3 2D/3D graphics engine in verilog☆687Updated 11 years ago
- MCPU - A Minimal 8Bit CPU in a 32 Macrocell CPLD☆230Updated 10 months ago
- ☆247Updated 3 years ago
- The Zylin ZPU☆245Updated 10 years ago
- IceChips is a library of all common discrete logic devices in Verilog☆154Updated 3 months ago
- Pano Logic G2 Reverse Engineering Project☆146Updated 4 years ago
- i8080 precise replica in Verilog, based on reverse engineering of real die☆159Updated 6 years ago
- MIPSfpga+ allows loading programs via UART and has a switchable clock☆111Updated 6 years ago
- A Video display simulator☆175Updated 8 months ago
- Small footprint and configurable DRAM core☆462Updated last week
- 32-bit RISC-V system on chip for iCE40 FPGAs☆313Updated 2 years ago
- A tiny Open POWER ISA softcore written in VHDL 2008☆709Updated last week
- LatticeMico32 soft processor☆107Updated 11 years ago
- An implementation of the Z80 CPU for Altera, Xilinx and Lattice FPGAs☆164Updated 5 years ago
- A FPGA core for a simple SDRAM controller.☆122Updated 4 years ago
- A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set☆65Updated 7 months ago
- A simple RISC-V processor for use in FPGA designs.☆283Updated last year