GuzTech/shdl6800 external links

---

GitHub - View repository

GitHub.dev - Open in online code editor

Star history - Growth chart over time

deps.dev - Dependencies and security vulnerabilities

Gitingest - Export source code for LLM usage

Repomix - Export source code for LLM usage

uithub - Export source code for LLM usage

Close

GuzTech/shdl6800

Readme badge preview -

If you own this repo, copy the snippet below and add it to your README.md

---

Copy

[![RelatedRepos](https://img.shields.io/badge/related-repos-yellow)](https://relatedrepos.com/gh/GuzTech/shdl6800)

Close

GuzTech / shdl6800View on GitHubMore

• External links
• Readme badge

shdl6800: A 6800 processor written in SpinalHDL

☆25Jan 12, 2020Updated 6 years ago

Alternatives and similar repositories for shdl6800

Users that are interested in shdl6800 are comparing it to the libraries listed below

• nathanrossi / meta-hdl

  View on GitHub
  HDL tools layer for OpenEmbedded
  ☆17Oct 20, 2024Updated last year
• rgwan / bapi-rv32i

  View on GitHub
  A extremely size-optimized RV32I soft processor for FPGA.
  ☆27Jun 19, 2018Updated 7 years ago
• mmicko / cross-fpga

  View on GitHub
  Cross compile FPGA tools
  ☆21Jan 4, 2021Updated 5 years ago
• abnoname / iceZ0mb1e

  View on GitHub
  FPGA 8-Bit TV80 SoC for Lattice iCE40 with complete open-source toolchain flow using yosys and SDCC
  ☆58Feb 3, 2023Updated 3 years ago
• daveshah1 / up5k-demos

  View on GitHub
  ice40 UltraPlus demos
  ☆23Oct 12, 2020Updated 5 years ago
• ZiCog / sodor-spinal

  View on GitHub
  An implementation of the Sodor 1-Stage RISC-V processor in SpinalHDL.
  ☆14Jun 5, 2019Updated 6 years ago
• smunaut / iua

  View on GitHub
  ice40 USB Analyzer
  ☆57Aug 8, 2020Updated 5 years ago
• xobs / valentyusb

  View on GitHub
  USB Full-Speed core written in migen/LiteX
  ☆12Sep 19, 2019Updated 6 years ago
• SteffenReith / J1Sc

  View on GitHub
  A reimplementation of a tiny stack CPU
  ☆87Dec 8, 2023Updated 2 years ago
• whitequark / icefloorplan

  View on GitHub
  iCE40 floorplan viewer
  ☆24Jun 23, 2018Updated 7 years ago
• steveicarus / simbus

  View on GitHub
  Icarus SIMBUS
  ☆20Nov 6, 2019Updated 6 years ago
• lawrie / saxonsoc-ulx3s-bin

  View on GitHub
  The binaries for SaxonSoc Linux and other configurations
  ☆17Mar 23, 2023Updated 2 years ago
• XekriRedmane / n6800

  View on GitHub
  A 6800 CPU written in nMigen
  ☆49Jun 16, 2021Updated 4 years ago
• rob-ng15 / PAWS

  View on GitHub
  PLEASE MOVE TO PAWSv2
  ☆16Feb 2, 2022Updated 4 years ago
• antmicro / usb-test-suite-build

  View on GitHub
  Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores
  ☆53Aug 7, 2023Updated 2 years ago
• B0WEN-HU / gr-verilog

  View on GitHub
  This is an OOT module for GNU Radio integrating verilog simulation feature
  ☆38Sep 23, 2019Updated 6 years ago
• mattvenn / crap-o-scope

  View on GitHub
  crap-o-scope scope implementation for icestick
  ☆20Jun 1, 2018Updated 7 years ago
• pepijndevos / seqpu

  View on GitHub
  A bit-serial CPU
  ☆20Sep 29, 2019Updated 6 years ago
• lethalbit / kicad-pdk-libs

  View on GitHub
  KiCad symbol library for sky130 and gf180mcu PDKs
  ☆34Feb 14, 2024Updated 2 years ago
• jerry-D / 64-bit-Universal-Floating-Point-ISA-Compute-Engine

  View on GitHub
  RISC-V Rocket Chip Strap-on-Booster with Fused Universal Neural Network (FuNN) eNNgine
  ☆21Mar 17, 2022Updated 3 years ago
• dbhi / vboard

  View on GitHub
  Virtual development board for HDL design
  ☆42Mar 31, 2023Updated 2 years ago
• swetland / os-workshop

  View on GitHub
  Some materials and sample source for RV32 OS projects.
  ☆22May 31, 2022Updated 3 years ago
• wjoeyzhewei / Alpha64_R10000_Superscalar_Processor

  View on GitHub
  Alpha64 R10000 Two-Way Superscalar Processor
  ☆11May 6, 2019Updated 6 years ago
• SymbioticEDA / MARLANN

  View on GitHub
  Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks
  ☆92Jul 3, 2019Updated 6 years ago
• FPGAwars / FLIX-V

  View on GitHub
  FLIX-V: FPGA, Linux and RISC-V
  ☆42Nov 5, 2023Updated 2 years ago
• adamgreig / daqnet

  View on GitHub
  ☆63Jul 21, 2020Updated 5 years ago
• numato / HDMI2USB-numato-opsis-hardware

  View on GitHub
  The Numato Opsis board is the first fully open source HDMI2USB board.
  ☆13Sep 8, 2015Updated 10 years ago
• IPDBG / IPDBG

  View on GitHub
  IPDBG
  ☆13Aug 22, 2025Updated 6 months ago
• felixheld / photonSDI

  View on GitHub
  photonSDI - an open source SDI core
  ☆10May 26, 2021Updated 4 years ago
• tmeissner / gatemate_experiments

  View on GitHub
  Experiments with Cologne Chip's GateMate FPGA architecture
  ☆17Nov 16, 2023Updated 2 years ago
• daveshah1 / hilotof

  View on GitHub
  HiLoTOF -- Hardware-in-the-Loop Test framework for Open FPGAs
  ☆13Feb 9, 2019Updated 7 years ago
• Obijuan / iceFactory

  View on GitHub
  A Javascript library for generating blocks for the ICEstudio FPGA development environment
  ☆10Jul 31, 2018Updated 7 years ago
• xobs / spibone

  View on GitHub
  Wishbone bridge over SPI
  ☆11Nov 13, 2019Updated 6 years ago
• mcci-catena / catena-riscv32-fpga

  View on GitHub
  RISC-V 32-bit core for MCCI Catena 4710
  ☆10Jul 31, 2019Updated 6 years ago
• space-tudelft / cacd

  View on GitHub
  Space CACD
  ☆11Oct 16, 2019Updated 6 years ago
• xobs / netv2-fpga

  View on GitHub
  FPGA code for NeTV2
  ☆15Dec 3, 2018Updated 7 years ago
• antmicro / usb-test-suite-cocotb-usb

  View on GitHub
  ☆10Apr 8, 2021Updated 4 years ago
• asinghani / pifive-cpu

  View on GitHub
  RISC-V CPU in SystemVerilog & Custom Migen-based SoC Generator
  ☆10Dec 29, 2021Updated 4 years ago
• pmezydlo / BeagleWire

  View on GitHub
  This repository contains software for BeagleWire. It is a realization of my project for GSOC-2017
  ☆46Oct 10, 2018Updated 7 years ago