gsmecher / minimaxLinks
Minimax: a Compressed-First, Microcoded RISC-V CPU
☆220Updated last year
Alternatives and similar repositories for minimax
Users that are interested in minimax are comparing it to the libraries listed below
Sorting:
- A configurable RTL to bitstream FPGA toolchain☆35Updated 2 weeks ago
- 😎 A curated list of awesome RISC-V implementations☆136Updated 2 years ago
- CoreScore☆155Updated 4 months ago
- Linux capable RISC-V SoC designed to be readable and useful.☆143Updated last week
- Naive Educational RISC V processor☆83Updated this week
- Example LED blinking project for your FPGA dev board of choice☆175Updated last week
- Glacial - microcoded RISC-V core designed for low FPGA resource utilization☆84Updated 5 years ago
- A configurable and approachable tool for FPGA debugging and rapid prototyping.☆136Updated last month
- 4 stage, in-order, secure RISC-V core based on the CV32E40P☆146Updated 7 months ago
- Experimental flows using nextpnr for Xilinx devices☆237Updated 7 months ago
- Design digital circuits in C. Simulate really fast with a regular compiler.☆173Updated 2 years ago
- Exploring gate level simulation☆58Updated last month
- SoC based on VexRiscv and ICE40 UP5K☆158Updated 2 months ago
- Small footprint and configurable DRAM core☆415Updated last week
- User-friendly explanation of Yosys options☆113Updated 3 years ago
- RISC-V RV64GC emulator designed for RTL co-simulation☆229Updated 6 months ago
- ⛔ DEPRECATED ⛔ Lean but mean RISC-V system!☆224Updated last year
- Documenting Lattice's 28nm FPGA parts☆143Updated last year
- CORE-V Family of RISC-V Cores☆269Updated 3 months ago
- The Zylin ZPU☆243Updated 10 years ago
- Basic RISC-V CPU implementation in VHDL.☆165Updated 4 years ago
- CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, suppo…☆381Updated this week
- A utility for Composing FPGA designs from Peripherals☆179Updated 5 months ago
- Virtual Development Board☆60Updated 3 years ago
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆114Updated last year
- Example designs showing different ways to use F4PGA toolchains.